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Design Abstraction—A Practical View

Date Posted: May 05, 2009 12:00 AM

The common factor with these two approaches is that the underlying FPGA architecture has been hidden, or more accurately, taken care of by automated systems within the design environment. As such, the systems go beyond just the implementation of a translation layer to make design capture more accessible.

THE UNDERLYING NUTS AND BOLTS
One of the key elements that allow these high-level design interfaces to become truly practical is the nature of function blocks or components used to assemble a design. These are the raw materials of the high-level design system, and exist as collections of embedded IP blocks that can be placed from a system library. The IP blocks can be created to be independent of the FPGA device or vendor, further freeing the system from low-level architecture considerations. Along with core blocks of functional logic, this soft IP can include microprocessors, peripherals and memory, so everything needed is ready to go.

The possibilities of the system expand dramatically, though, when abstraction layers are implemented in the embedded hardware IP components themselves. For example, library IP parts featuring the Wishbone OpenBUS standard can be included to “normalize” the interfaces between processors, memory, and peripherals. These simplify bus interconnection systems to a point where the system, rather than the designer, can handle the low-level hardware architecture.

Using this approach, library-based hardware interface cores can also be introduced that “wrap” around pre-defined processors and peripherals, providing an isolating layer between the existing interface arrangement and a hardware Wishbone bus (Fig. 3). These configurable hardware interface cores allow third-party or vendor IP blocks to be dropped into a design easily and changed at will. Changing to a different processor IP block causes minimal impact to the surrounding hardware, and when backed by compiler tool chains for all the supported processors, the embedded software can remain intact. Again, the system handles the hardware complexity, leaving the designer to implement the design’s functionality via the high-level design interfaces.

Simplifying the embedded hardware structure and design processes in this way means that complex processor-based embedded systems can be created and changed easily. The division between hardware and software is more flexible, allowing the partition to be moved throughout the design cycle rather than be locked at the beginning of the embedded development process. It also opens the possibility of implementing additional high-level systems that translate software algorithms into hardware co-processors, where the performance of the two options can be compared and selected accordingly.

When coupled with an underlying system that uses software-abstraction layers to segregate and configure the supporting hardware, high-level design capture systems allow designers to work directly with the embedded elements that define the crucial product functionality. Furthermore, the hardware platform is no longer the first consideration. Thus, it can be dealt with later, when the product’s form and function are developed to a mature state.

FREEDOM THOUGH UNITY
The critical factor in the successful implementation of a high-level design approach is the design tool infrastructure that supports it. Such an infrastructure needs to deliver the interconnection systems and design data-management capability that makes the process viable in practice.

As the lines between hardware and software design blur, raising the abstraction level of design processes must be pervasive —or unified—across all stages of the design process. For example, placing a USB block in a design has ramifications at a schematic, board, programmable-device and software level, so the abstracted IP block must inherently represent all of these elements and transparently interconnect with universal bus systems.

A unified design system—one that brings together hardware, software, and programmable hardware within a single application—makes such an approach possible by implementing a single design data model across all parts of the design processes. A block of functional IP that’s stored independently or as a library part can contain all of the elements needed to create a production-ready design—from PCB patterns right though to software drivers. When capturing the functional intent of a design, you just place and connect up a graphic symbol that represents the part. In the background, though, all elements of that part are imposed and connected across the entire unified design system.

At this level of design abstraction, engineers from all disciplines are free to create designs quickly in a modular connect-the-boxes way. This will ultimately speed the product development process and free designers to add value to the final product through innovative IP.

In addition, by raising the abstraction at a unified level, the traditionally complex process of bringing all of the elements of a design together—hardware, software and programmable hardware—is greatly simplified (Fig. 4). The design is now abstracted as a whole rather than at different, specialized levels within each design discipline, which liberates cross-discipline processes such as FPGA pin optimization and software-to-hardware transition.

To simplify and streamline today’s embedded design process, and make it accessible to more design engineers, the single step of introducing an abstraction layer that translates the design capture interface isn’t enough. Unlike traditional software development, embedded hardware design doesn’t exist in isolation. As a result, an insular design-abstraction system doesn’t address the interaction needed across the traditional design boundaries.

The key to making such a system truly practical is creating an infrastructure where the raised level of design abstraction is manifested through the whole design process. Presenting a consistent interface across those design boundaries allows engineers from all disciplines to assemble predefined functional design blocks easily, by simply using or building on their existing skills.

Ultimately, these systems both unify and simplify electronic product design, while freeing designers from all disciplines to create more innovative and intelligent products within a highly-accessible design environment.

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