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| EDA Alert e-Newsletter |
March 4, 2008
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Free Whitepaper From Cadence
Build 45-nm chips that meet your desired performance goals using
"signoff in the loop" technology. By using a single signoff engine, you
can significantly improve predictability, productivity, and
performance.
Download this free whitepaper to find out how this solution can help
designers and verification engineers.
Register Now
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Bring More Automation Into Mixed-Signal
Design
By Ashutosh Mauskar, Vice President of Product and Business
Development
Magma Design Automation, Custom Design Business
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A crisis of critical proportions is emerging as more and more IC
designs demand a complex mix of digital and analog functionality to
meet
cost, size, packaging, power, and price considerations. This is a
switch: in the past, most chips have been either digital or analog.
Read the
full article...
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Startup Accepts Challenge Of Sub-45-nm
Lithography
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As semiconductor manufacturing heads toward 45 nm as the next
mainstream node, the 32-nm node is next on the horizon. But the
wavelength of the light sources used to print circuit patterns on
silicon is stuck at 193 nm for the foreseeable future.
Read the
full article...
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Low-Power Design Flow Exploits UPF Support
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Low-power design is a systemic discipline, so it naturally follows
that a design flow intended to address low-power design should also
approach the task from a holistic point of view. This has been
Synopsys'
goal with its new Eclypse platform for IC designers.
Read the
full article...
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Magma Rolls Full-Chip, Mixed-Signal
Design/Verification Suite
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With the release of its Titan full-chip mixed-signal design,
analysis and verification platform, Magma Design Automation serves
notice that it's chasing a piece of the analog/mixed-signal market.
Because Titan is based on Magma's unified data model, it works
seamlessly with Magma's Talus digital IC implementation, FineSim Pro
circuit simulation, Quartz DRC and Quartz LVS physical verification
products and transistor-level extraction.
Read the
full article...
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Tools For Validating OCP Implementations
Upgraded
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In its CoreCreator II, which comprises verification IP and
command-line based tools for validating Open Core Protocol (OCP)
implementations, the Open Core Protocol International Partnership
(OCP-IP) hopes to reduce system-on-a-chip (SoC) design time and risk
while improving time to market.
Read the
full article...
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Parasitic Extractor Addresses Dielectric
Capacitance
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In the latest version of its Q3D Extractor, Ansoft gives designers
a
window into the capacitance and conductance issues prevalent in lossy
dielectrics. Version 8 of the parasitic extraction tool features a
capacitance solver that is optimized to exploit available computer
memory and perform multiple frequency evaluations and allows users to
model infinite ground planes.
Read the
full article...
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Check Out the Latest Views and News from APEC 2008
Electronic Design's APEC 2008 Hotspot has the latest coverage on this
year's IEEE APEC tradeshow, including commentary from Analog/Power
Editor Don Tuite and product coverage fresh from the event.
CLICK HERE
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In our March 27 cover story,
Technology Editor Daniel Harris will look at the state of robotics
technology. Which development will we need to see the most before we
get
a robot in every home?
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- Less expensive sensors
- Better development software
- Smarter artificial intelligence
- More engineers to design the technology
- Government support
Click here to
take the poll. Remember to scroll down, the poll is at the bottom of
the
page.
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Voice Over WLAN: The Complete Guide
By
Michael F. Finneran
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Voice Over WLAN: The Complete Guide by Michael F. Finneran is a
detailed look at the digital voice over Wi-Fi movement. As you may
know,
there is growing interest in making phone calls over an enterprise LAN
by using 802.11 phones. The book also reviews the relevant fundamentals
like radio transmission fundamentals and wireless LAN components and
equipment.
Read the
full article...
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Rev Up Your Interdisciplinary Design Skills
What happens when a microcontroller turns on a power FET, sending a
current pulse to a motor coil that develops a magnetic field that turns
the rotor shaft, advancing a timing belt that drives a pair of nip
rolls
suspended on bearings in a web-processing operation on a form, fill,
and
seal machine installed on a potato chip line at a Frito Lay plant in
central California? And how can you be sure that the encoders, prox
sensors, and other feedback devices you plan to use will accurately see
and report every relevant motion, machine state, and process condition?
And will the signals get through the networks fast enough, without
being
corrupted, giving the controllers time to execute their algorithms as
intended? It's a lot to think about, and it only scratches the surface
of what many engineers grapple with today. If you happen to be one of
them, then the place for you — where you can find answers and
meet
others with similar concerns — is www.Mechatronic-Design.com.
Backed by some of engineering's top information sources including
Machine Design, Electronic Design, Motion System Design, and Power
Electronics, Mechatronic-Design.com is the interdisciplinary
engineer's desktop, toolbox, library, and lifeline in one easily
accessible place.
Find. Learn. Apply.
Mechatronic-Design.com
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