Greater system complexity
and ever-higher
clock speeds continue
to push IC power consumption
to the limit. And though
every generation escalates the
demand on IC current, voltage levels
drop due to steadily declining
feature sizes on the silicon. Those
lower voltage levels cause the
power-supply noise margin (typically
5% from nominal) to shrink
across the chips’ power-supply
terminals. A noise level of 250 mV
might be acceptable for a 5-V power supply, but could be
disastrous for a 1-V supply.
The objective of the power delivery network (PDN) is to
provide stable power to the ICs. However, switching circuitry
demands static and dynamic current, which across
the PDN impedance causes the voltage to fluctuate at the
chip’s power-supply terminals.
To effectively deliver power to the chip with minimal
noise, the PDN’s input impedance should be below a
specified design target over the entire frequency spectrum
of interest, from dc to several hundreds of megahertz. A
first-order design target for the PDN impedance is defined
as the ratio of voltage tolerance to transient current. For
example, for a supply voltage of 1 V with 5% maximum
allowable ripple and with the device drawing 5 A of transient
current, the target impedance is:
In theory, the PDN impedance from the chip’s perspective
should be below this target up to at least the second
harmonic of the fundamental switching frequency.
Although a flat impedance profile in the frequency band
of interest is desired, attempts are made to keep the PDN
impedance below 10 mΩ up to 500 MHz (twice the fundamental
frequency). This article discusses an
intuitive Spice-based, system-level approach to planning,
analyzing, and ultimately implementing the PDN layout
scheme with a goal of meeting the target impedance within
the defined frequency band.
WHAT IS A POWER DELIVERY NETWORK?
The PDN transports energy from the power supply to the
chip using a combination of a voltage regulator module
(VRM), discrete capacitors (bulk and high-frequency ceramic),
and on-chip capacitance, all of which are connected to
the switching device by passive metal structures, such as
planes, vias, and traces. The series inductance of the metal
conductors limits the amount of current that can be drawn
at a given frequency. The reactance (jωL) of a conductor
monotonically increases with frequency, and its maximum
effectiveness can be found by comparing its reactance
with the target impedance of the PDN. Capacitors are used
to suppress the monotonic increase in impedance above
the target. Their size and locations depend on the target
frequency. The physical description of a typical PDN is in
represented in circuit format (Figure 1 and Figure 2).
HOW TO CHOOSE CAPACITORS
Decoupling capacitors form an integral part of a PDN, and
their main function is to bring the power supply as “electrically”
close to a switching device as possible. They act as a
distributed storage of charge accessible by the switching
device via a low-impedance (low loop inductance)
path. Most of the current demanded by the switching IC
is provided by the capacitors, while the main power supply
serves to replenish the depleted capacitors.
Choosing the proper capacitance values requires an
understanding of how a capacitor behaves. The reactance
of an ideal capacitor is inversely related to frequency and decreases monotonically until it reaches an infinitesimally
small value. This behavior perfectly suits most applications
that demand current at high frequencies.
However, a real capacitor, due to its physical construction,
has an associated parasitic inductance (referred to as equivalent
series inductance, or ESL) and resistance (referred to as equivalent
series resistance, or ESR), which considerably alters the
impedance behavior. A graph can show the impedance behavior
of an ideal capacitor versus that of a real capacitor (Fig. 3).
The frequency at which the capacitor changes its behavior
from capacitive to inductive is called the self-resonant frequency
of that capacitor. At the resonant frequency, the capacitive
reactance is exactly equal to the inductive reactance, canceling
each other out with just the ESR as its total impedance.
That is, the impedance of a capacitor at resonance is lowest
and is most effective in supplying charge at that frequency:
Manipulating the above relationship, the resonant frequency
of a capacitor can be calculated as:
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