MELDING DESIGN AND TEST
Many PCB designers would stand to gain from broadened functionality in their design tools. In a joint survey conducted last year by National Instruments and Tektronix, 44% of designers said they'd benefit from connectivity between their EDA tools and measurement equipment.
The latest release of the Electronics Workbench DesignSuite embodies National Instruments' response. Version 9 of the suite seeks to break down the artificial partitions between part selection, desktop design work, and benchtop measurement by forging tight integration between version 9 of Multisim, its popular PCB simulation tool, and LabView, the company's flagship virtual instrumentation software.
As a result, designers now can use LabView to build custom virtual instruments for use within Multisim. Simulated circuits then can be driven using real-world stimulus acquired via LabView and NI's SignalExpress, a package for signal acquisition and analysis. To close the loop, simulation results are easily imported into Lab-View and SignalExpress for correlation purposes.
THE PERILS OF PLACEMENT
Believe it or not, component placement is among the more vexing aspects of PCB design today. That's largely due to the fact that over the course of a system design, component netlists change many times, making for a highly convoluted and difficult-to-manage placement process. Some estimates say that it consumes as much as 50% or more of the total PCB-design cycle.
Few tools on the market automate the process of component placement on PCBs. One notable example is DesignAdvance's CircuitSpace, a 3D placement tool purported to shave up to 40% off the overall PCB cycle. According to Randy Eager, CEO of DesignAdvance, CircuitSpace employs an extended pattern-search algorithm to find a global optimum solution for component placement.
CircuitSpace operates within the Cadence Allegro PCB design flow. It appears as a pull-down menu rather than functioning as a standalone tool (Fig. 4). Allegro considers routing as it performs automatic placement based on the user's constraints.
An important factor in CircuitSpace's ability to compress placement is its cluster-definition functionality. When PCB designers perform placement, they first cluster components by connectivity and package type. CircuitSpace performs this step automatically, reducing a process that ordinarily takes days into mere minutes. CircuitSpace also makes reuse of earlier boards' sections much easier, automating the time-consuming and error-prone process of assigning reference designators.
Like many other aspects of system design, PCB design is a global affair. Design teams scattered all over the world must collaborate smoothly. To facilitate this collaboration, Mentor Graphics recently debuted its Expedition Enterprise flow for multisite, global electronics companies.
A major aspect of Expedition Enterprise is its IP management capabilities. It enables design teams to efficiently create, control, and provide access to IP on a global scale. These capabilities encompass design data, library data, and design constraints, as well as design-intent information.
Much like Altium's Designer 6.0, Mentor's Expedition Enterprise manages PCB/FPGA co-design. It includes signal-integrity verification functions and uses a correct-by-construction methodology to place and route complex boards. The package also addresses regulation compliance.
The systems emanating from global companies often are distributed globally. Expedition Enterprise helps designers keep track of country-specific directives, specifically in the Restrictions on Hazardous Substances(RoHS)/Waste from Electrical and Electronic Equipment (WEEE) areas.
This process begins at part selection. The tool can be instructed to block selection of noncompliant parts. It then follows through with guidance on other materials as well as documentation.
It's become clear where PCB design tools are headed. Now, they must evolve to fill the changing needs of designers. So far, the EDA industry seems to be up to the task.