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Software Simulation Blasts Bugs In Network Hardware Designs

You can save time and money by finding system bugs and performance bottlenecks early in the design cycle without building a hardware prototype.


Michael J. Miller

July 07, 2003

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DESIGN VIEW is the summary of the complete DESIGN SOLUTION contributed article, which begins on Page 2.

Conventional hardware debugging techniques can't keep up with today's complex network products. As a result, design bugs remain unseen until system hardware is prototyped. Fortunately, designers have a better alternative: using software simulation to find system bugs and performance bottlenecks early in the design cycle. Soft-ware simulation changes the development flow to let designers check performance and correct an architecture as needed, without building a hardware prototype. Bugs are then found and fixed early in the design cycle.

In a conventional design-flow process, designers can debug, test, and optimize the hardware and software only after the software is executed on a prototype board. If a large performance problem emerges, the designer would have to re-adjust the architecture and potentially modify the schematic and circuit board. What this translates into is a schedule slip of typically two to five months or a sacrifice in function or performance. Further hindering the conventional flow is the increased use of sophisticated network processor units (NPUs) to process packets in the datapath and perform management functions in a separate CPU.

Software simulation of the NPU and elements that connect to it can circumvent conventional debugging problems. This system-level architectural modeling offers maximum visibility and control. System-level simulations are usually data-accurate models, which don't consider timing of the device. To address timing, both data- and cycle-accurate models exist.

Discussed in this article are the many benefits of system-level simulation. The article also points out what to look for once the decision is made to take the software route.

HIGHLIGHTS:
The Old Flow The conventional design flow starts by deciding on an architecture. Then the schematic is captured and the circuit board fabricated while writing software. Once software is executed on a prototype, then you can debug and test.
Growing Complications Use of network processor units (NPUs) makes the conventional flow more difficult. Designing an NPU-based line card requires balancing of compute resources.
Key Goals For network products to achieve performance/cost goals, tradeoffs are made and development tools tweak the system early in the cycle for optimal performance. But today's complex designs are obsoleting conventional debuggers.
A Simulation Solution Avoid conventional debugging problems by doing software simulation of the NPU and elements (e.g., coprocessors) that connect to the NPU. Such simulation provides maximum visibility and control.


Full article begins on Page 2

DESIGN VIEW is the summary of the complete DESIGN SOLUTION contributed article, which begins on Page 2.

Conventional hardware debugging techniques can't keep up with today's complex network products. As a result, design bugs remain unseen until system hardware is prototyped. Fortunately, designers have a better alternative: using software simulation to find system bugs and performance bottlenecks early in the design cycle. Soft-ware simulation changes the development flow to let designers check performance and correct an architecture as needed, without building a hardware prototype. Bugs are then found and fixed early in the design cycle.

In a conventional design-flow process, designers can debug, test, and optimize the hardware and software only after the software is executed on a prototype board. If a large performance problem emerges, the designer would have to re-adjust the architecture and potentially modify the schematic and circuit board. What this translates into is a schedule slip of typically two to five months or a sacrifice in function or performance. Further hindering the conventional flow is the increased use of sophisticated network processor units (NPUs) to process packets in the datapath and perform management functions in a separate CPU.

Software simulation of the NPU and elements that connect to it can circumvent conventional debugging problems. This system-level architectural modeling offers maximum visibility and control. System-level simulations are usually data-accurate models, which don't consider timing of the device. To address timing, both data- and cycle-accurate models exist.

Discussed in this article are the many benefits of system-level simulation. The article also points out what to look for once the decision is made to take the software route.

HIGHLIGHTS:
The Old Flow The conventional design flow starts by deciding on an architecture. Then the schematic is captured and the circuit board fabricated while writing software. Once software is executed on a prototype, then you can debug and test.
Growing Complications Use of network processor units (NPUs) makes the conventional flow more difficult. Designing an NPU-based line card requires balancing of compute resources.
Key Goals For network products to achieve performance/cost goals, tradeoffs are made and development tools tweak the system early in the cycle for optimal performance. But today's complex designs are obsoleting conventional debuggers.
A Simulation Solution Avoid conventional debugging problems by doing software simulation of the NPU and elements (e.g., coprocessors) that connect to the NPU. Such simulation provides maximum visibility and control.


Full article begins on Page 2

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