Central to many highly integrated devices are communication standards, image formats, and other functions with existing reference ANSI C algorithms. It can be difficult for RTL designers to optimize those algorithms for a given implementation.
Synfora's PICO technology, which it licensed from Hewlett-Packard, automatically generates optimal architectures and synthesizable RTL from ANSI C algorithms in hours or days. PICO technology consists of two elements: configurable intellectual property (IP) and exploration and configuration tools.
Any C algorithm can be analyzed and parsed into programmable segments that are best implemented in very-long-instruction-word (VLIW) code and in compute-intensive segments that are best implemented in dedicated coprocessors.
After analysis, the exploration and configuration tools explore the tradeoffs between performance and area by partitioning of the algorithm between VLIW code and what Synfora calls Pipelines of Processing Arrays (PPAs). The tools create a Pareto optimal list of implementation architectures within user-defined constraints. Because the RTL is created from pre-verified IP, the results are correct by construction.
Unlike earlier attempts at C-to-RTL synthesis delivered as either an EDA tool or IP, PICO technology combines parallel compiler and synthesis capabilities linked to configurable RTL IP. The combination suits PICO to designers who must build custom blocks with significant amounts of parallelism.
"PICO is a compiler that analyzes the C algorithm to determine how much parallelism can be wrung from this algorithm," says Simon Napper, president and CEO of Synfora.
PICO will be available in the first quarter of 2004. Pricing hasn't been set yet.
Synfora Inc.
www.synfora.com
See associated figure
Central to many highly integrated devices are communication standards, image formats, and other functions with existing reference ANSI C algorithms. It can be difficult for RTL designers to optimize those algorithms for a given implementation.
Synfora's PICO technology, which it licensed from Hewlett-Packard, automatically generates optimal architectures and synthesizable RTL from ANSI C algorithms in hours or days. PICO technology consists of two elements: configurable intellectual property (IP) and exploration and configuration tools.
Any C algorithm can be analyzed and parsed into programmable segments that are best implemented in very-long-instruction-word (VLIW) code and in compute-intensive segments that are best implemented in dedicated coprocessors.
After analysis, the exploration and configuration tools explore the tradeoffs between performance and area by partitioning of the algorithm between VLIW code and what Synfora calls Pipelines of Processing Arrays (PPAs). The tools create a Pareto optimal list of implementation architectures within user-defined constraints. Because the RTL is created from pre-verified IP, the results are correct by construction.
Unlike earlier attempts at C-to-RTL synthesis delivered as either an EDA tool or IP, PICO technology combines parallel compiler and synthesis capabilities linked to configurable RTL IP. The combination suits PICO to designers who must build custom blocks with significant amounts of parallelism.
"PICO is a compiler that analyzes the C algorithm to determine how much parallelism can be wrung from this algorithm," says Simon Napper, president and CEO of Synfora.
PICO will be available in the first quarter of 2004. Pricing hasn't been set yet.
Synfora Inc.
www.synfora.com
See associated figure