The use of Ethernet in industrial control applications
is growing at an estimated 50% compound
annual growth rate. Leading companies
such as Cisco, Rockwell Automation, and Schneider
Electric are promoting the use of standard IEEE 802.3
Ethernet as the basis for industrial Ethernet. As a result, the
non-deterministic aspect of Ethernet must be addressed in
time-critical control systems. Standard IEEE-1588 time synchronization
can compensate for some of the non-deterministic
behavior, but this approach has its limits.
End devices on the network are usually designed with inherent
single-path processing of packet streams controlled via a
real-time operating system (RTOS), limiting the end device’s
ability to respond to high-priority packets and making them
vulnerable to denial-of-service attacks. A silicon alternative
to a conventional software-implemented RTOS kernel, an
“RTOS kernel in a chip,” could provide the answer.
In real-time control loops, data packet timing jitter causes
problems. Non-critical packets such as http and ftp can delay
critical messages, preventing control loops from operating correctly.
Quality-of-service (QoS) tags can be used to prioritize
the handling of packets at the network switches, but end devices
are still vulnerable to packet delays. In the worst case, an
overload of low-priority packets can create a denial-of-service
situation and prevent the processing of time-critical messages.
THE FRAGMENTED ETHERNET APPROACH
To address the QoS service problem, some companies are
proposing modifications to Ethernet. They want to create time
slots that allow motion control and other time-critical traffic
to come through at predetermined times and shut down the
network for other traffic during those critical periods.
However, major players such as Cisco, Rockwell Automation,
and Schneider Electric have banded together with
the Open DeviceNet Vendors Association (ODVA) to avoid
fragmenting into standard and non-standard Ethernet. With
Ethernet, the TCP/IP stack tends to be a bottleneck for end
devices in the network. The combination of the operating
system (OS) and the stack can get bogged down handling the
incoming traffic in the buffer.
AN ALTERNATIVE—AN EMBEDDED RTOS KERNEL
Creating two paths through the end device, one for highpriority
messages and one for low-priority messages, with the
ability to interrupt and instantly switch between them can
improve the QoS. For example, Innovasic’s 32-bit, 66-MHz
fido (flexible input, deterministic output) microcontroller
implements this embedded hardware approach.
In fido, this is done using an on-chip programmable I/O
engine that performs the media access control (MAC) function
and examines each packet to determine its QoS priority.
At this point, the traffic is separated on the chip, and the
“silicon RTOS kernel” takes control. High-priority packets are
buffered and processed using one of fido’s “hardware contexts,”
while low-priority packets are buffered separately and processed
using another lower-priority hardware context.
Each hardware context is the silicon equivalent of an RTOS
thread, but with priority and context switching all handled in
silicon. This approach is extremely deterministic and maintains
a physically separate path all the way from the physical layer
(PHY) to the application.
In a conventional software RTOS, context switching times
are non-deterministic and impacted by many factors beyond
the control of the embedded system designer. In particular,
a conventional RTOS cannot normally interrupt TCP/IP
stack processing. So if the stack has just begun processing a
low-priority packet, a high-priority packet arriving at the chip
must wait.
The silicon RTOS kernel overcomes this inherent limitation
of software-based RTOS control by giving high-priority
traffic instantaneous access to the CPU at all times. Not only
does this allow for real-time processing of high-priority packets,
it also provides protection from denial-of-service attacks at
the end device.
Using an industrial Modbus/TCP application, Schneider
Electric evaluated fido with its embedded RTOS kernel against
a popular 133-MHz 32-bit RISC processor with a softwareimplemented
RTOS kernel. The fido’s programmable I/O
engines provided a custom Ethernet MAC with two separate
data paths on the silicon based on the QoS tags. This custom
MAC was 100% compliant with standard 802.3 Ethernet.
The on-chip RTOS kernel provided a partitioned execution
environment, with separate contexts to handle the low-priority
and high-priority TCP/IP stacks and traffic flow. With the
embedded kernel and custom MAC, the fido MCU achieved a
worst-case latency of 1.1 ms and worst-case jitter of 130 µs.
In contrast, the processor with the software RTOS kernel
achieved worst-case 1.8-ms latency and worst-case jitter of
760 µs. In time-critical applications such as motion control, a
39% reduction in latency and almost six-times reduction in jitter
QoS improvement demonstrates a technique that is an
alternative to a fragmented Ethernet approach.