VME is one of the oldest military/commercial-off-the-shelf (MIL/COTS) buses that still has regular design wins. Its parallel backplane bus was the fastest around at one time. The VME320 standard released in 1997 runs at 320 Mbytes/s, though high-speed serial interfaces like Serial RapidIO and Gigabit Ethernet have superceded the parallel bus.
VITA, the standards group that manages VME technology, started with VME (VITA 1.0). VITA 1.5 defines VME320, or VME 2eSST. The high-speed serial platforms include VPX (Table 1), VXS (Table 2), and XMC (Table 3). VPX and VXS are board standards like VME and use 3U and 6U form factors. XMC is a mezzanine card standard using high-speed serial interfaces. It’s an alternative to the PCI mezzanine card (PMC), whch uses a parallel PCI interface.
VME and PMC with its PCI bus were relatively stable and easy to contend with. The high-speed serial interfaces are well defined, but the number of options available can be mind-numbing. The list includes serial interfaces such as Serial RapidIO, InfiniBand, PCI Express, Gigabit Ethernet, 10-Gbit Ethernet, Aurora, HyperTransport, and XAUI. Although these interfaces are all point-to-point connections, they typically work with a hub or switch.
In addition, the reduction of pins needed to deliver comparable throughput on a high-speed serial interface is significantly lower than a parallel interface like VME or PCI. This allows many boards and platforms to handle multiple connections. A single connection allows a star configuration while dual connections support a dual-star setup (Fig. 1), providing redundancy.
A full mesh requires more connections but provides maximum bandwidth. A dual mesh offers redundancy but is a very complex backplane. Even tree or inverted-tree architectures and asymmetrical designs are options that may be more suitable to some applications. For example, a radar processing system might work best with an inverted tree where many inputs are reduced to a single result, with each level of the tree handing off a smaller processed subset of data to the next level.
The options get even more complex when mixing interconnects. This complexity is compounded by the more advanced MultiGig connectors (Fig. 2) used with VXS and VPX high-speed serial interfaces like those from Tyco Electronics, which are actually multiple wafer-size circuit boards themselves. These interconnects are used on VXS and VPX boards like Curtiss-Wright Controls Embedded Computing’s 6U VPX Champ-AV6 (Fig. 3) with four Freescale dual-core microprocessors with built-in Serial RapidIO connections.
Add to all this the ability to mix and match high-speed serial interfaces, typically Ethernet with another interface, and it is easy to see how the number of options grows significantly. Designers employing VXS and VPX often require custom backplanes, taking advantage of the backplane I/O connectors available on the 3U and 6U boards and further adding to the chaos. Attaining a level of compatibility between vendors was more than a challenge. OpenVPX looks to bring a little order to the chaotic number of options.
PROFILING A STANDARD
Formerly known as OpenVPX, VITA 65 is a systems-level specification designed so boards and systems can play nicely with each other by profiling a useful subset of the available standards such as those from VITA (see “VPX Moves Forward With OpenVPX And Additional VITA Specs”). System designers can then start with a profile instead of a lower-level form factor and interconnect level.