AC-DC Switcher IC Yanks The Plug On Linears

Conceptually, the change was very simple. Primarily it demanded acceptance of less voltage regulation than was provided by a typical switcher while still satisfying the performance requirements imposed on the targeted linear supplies. However, it also required some changes in the chip's internal control characteristics. A description of LinkSwitch's operation helps to explain the concept.

When V_IN is applied at power-up, the control pin capacitor (C3 in Figure 1) is charged through a switched high-voltage current source connected internally between the chip's drain and control pins. The voltage between the control and source pins then rises until it reaches 5.6 V. At that point, the chip's control circuitry begins operating and starts to switch the internal high-voltage MOSFET. From then on, C3 provides power to the chip.

Following power-up, the chip operates in a CC mode. In this stage, the output voltage rises and with it the reflected voltage across the primary transformer winding. As the reflected voltage rises, the feedback control current, I_C, in-creases. I_C, in turn, determines the chip's internal current limit, I_LIM (Fig. 4). That value is at a maximum when it reaches I_DCT. However, before it hits that limit, it arrives at another value, I_DCS. The internal current limit characteristic of the chip maintains an approximately constant power-supply-output current until the control current reaches the I_DCS value.

At that point, the chip switches to a CV mode of operation. Once I_C exceeds I_DCS, the chip begins to control the duty cycle of its switching frequency to maintain an almost constant output voltage. When the control current reaches I_DCS, duty cycle is about 77%. As the output voltage rises further in response to changes in the load, I_C increases until I_LIM equals I_DCT (corresponding to a 30% duty cycle). While it does so, the chip reduces its duty cycle to maintain a CV output. When the duty cycle falls below 3.8 %, the switching frequency decreases from 42 kHz to 30 kHz to lower energy consumption under light loads.

The LinkSwitch design differs from the TOPSwitch implementation in a few ways. The current limit in LinkSwitch is adjusted as a function of I_C to ensure that the power supply's output current remains approximately constant as the output voltage drops. Meanwhile, the gain of duty-cycle reduction (the slope of duty cycle versus I_C) has been increased in LinkSwitch to boost the chip's line and load regulation.

In addition, the gain of current limit reduction has been chosen to provide an approximately constant output current as the output voltage drops. This ensures that the peak output current and the short-circuit current are well controlled, granting a further advantage over linears.

The LinkSwitch design eliminates the need for secondary-side voltage or current feedback, while maintaining regulation that's superior to linear power supplies. For applications that require tighter load regulation, LinkSwitch performance can be improved with optocoupler feedback. Other features include a low, 42-kHz switching frequency that simplifies the design of the external EMI filter (C1, L1, and C2 in Figure 1). The chips come in eight-pin DIP (LNK501P) and SMD (LNK501G) packages. The SMD version also is available in a tape-and-reel format.

Price & Availability

In quantities of 1000, unit pricing starts at $0.65. Samples are available from stock and production quantities are available within six weeks ARO.

Power Integrations Inc., 5245 Hellyer Ave., San Jose, CA 95138; Steve Micelli (408) 414-8821; www.powerint.com.