For a direct comparison with a conventional dc-dc converter, consider that a leading-edge quarter brick may deliver 165 W (50 A at 3.3 V) in a 1.45- by 2.28- by 0.4-in. form factor. That translates to 125 W/in.3 Seen another way, a PRM-VTM two-chip solution with a smaller footprint and lower profile than a quarter brick will deliver 60 A at 3.3 V. At 2.5-V output, where quarter bricks now deliver up to 60 A, the PRM-VTM combination would offer 80 A (Fig. 2).
However, this limited comparison overlooks the flexibility and additional capabilities of FPA and the V•I Chips. Because of the low output impedance of the VTM (approximately 1 mΩ on units with low output voltages), the device's load regulation will be good (on the order of ±5%) even when the PRM and VTM operate open loop.
In closed-loop operation, where the output voltage is fed back to the PRM, load regulation improves to better than 1%. With voltage feedback, which allows for remote output voltage sensing, the PRM responds to changes in the load by adjusting its regulated output up or down, typically as much as 5%.
Therefore, it's possible to use a single PRM to power multiple VTMs with different voltage-transformation ratios, or combine multiple PRMs and VTMs for independent voltage regulation on multiple outputs. It's also possible to parallel VTMs for higher current, or power VTMs off of existing dc-dc converters to generate a high-current POL. (For more on the different combinations, see "Mixing And Matching FPA Building Blocks" at www.elecdesign.com.)
The FPA approach offers an alternative to conventional brick-based distributed power schemes that duplicate isolation, voltage transformation, regulation, EMI filtering, and input protection at every point of load. Yet it also offers an alternative to the intermediate voltage bus architecture, where an isolated brick or bus converter feeds a series of nonisolated POL dc-dc converters. Because the intermediate voltage bus is at a low voltage (12 V or less), the bus converter will still need to be placed fairly close to the POLs, which is not a restriction with the FPA. Also, the lack of isolation in the POL converters makes overvoltage-sensitive loads more vulnerable to deadly faults and to potential ground loop problems. (For more, see "More Compact Than The Intermediate Voltage Bus" at www.elecdesign.com.)
The VTM's transient response opens up other possibilities. When faced with a 90% load step at 50 A/µs, the VTM can respond within 1.5 µs with a 5-µs settling time. Consequently, a PRM-VTM pair could replace a standard voltage regulator module (VRM) solution in some processor power applications. (For details, check out "V•I Chips May Challenge VRMs" online at www.elecdesign.com.)
By exploiting a zero-voltage switched and zero-current switched topology, the VTMs limit the common-mode and differential-mode noise at the point of load. For example, the output of a VTM configured to convert 48 V to 12 V exhibits about 50 mV p-p of high-frequency ripple. That noise voltage amounts to less than 0.5% of the dc output. This performance exceeds that of Vicor's low-noise bricks.
The FPA solution will be priced at about 14 cents/W per chip or 34 cents/A. Consequently, the PRM and VTM chips will each cost about $25 in volume. The company expects to provide multiple sources for the V•I Chips through licensing agreements and electronic manufacturing service providers. VTM chips are now sampling in limited quantities, and sampling of PRMs is expected to begin in the third quarter. The earlier sampling of the VTMs will let customers take advantage of the VTMs in applications that require high-density POL converters as described above.
VICOR CORP.
www.vicr.com • Robert Marchetti, (978) 470-2900