The quality of the pc-board capacitor is usually described as excellent because there's little inductance. As mentioned previously, inductance is the main reason for a capacitor's degradation as frequency increases.
The small size of the capacitance is a cause for concern. A general capacitance value quoted for a board to be effective in supplying currents is greater than 500 pF/in.2 Achieving such values isn't possible with FR4 boards. Values in that range require specialized pc-board design and materials.
EMC Benefits: Apart from the signal-integrity benefits achieved from a well-designed power-distribution system, the pc board will also have lower EMI. As mentioned earlier, this is primarily due to the decrease in the loop area. This appears in two ways. First, Faraday's Law shows the effect that loop area, A, has on voltages induced into the circuit by currents flowing in other circuits:
VINDUCED (volts) = [(µAN/2πd] Χ (dI/dt) Χ cos(θ) (12)
Also, a simplified expression of the electromagnetic fields from the current loops in the digital circuit shows a much lower set of emissions for the circuit with the smaller loop:
E (V/m) = 263 Χ 10-16 Χ [f2A(I/r)] (13)
Cost Benefits: A well-designed power-distribution system can save a lot of money. Equation 14 is a simple formula proving the savings as a function of a parts count reduction (see the Equation Listing). For example, consider a pc-board design that eliminates five capacitors on 400,000 boards, built each year for two years. Assume that it costs $0.006 to place each capacitor on the board. The net savings is about $36,000.
Thus far the discussion has centered around supplying currents to the chips. But the designer may want to limit current to the chips also. Remember that a chip can operate perfectly well as long as it receives the current it needs below an upper frequency, 10 * fmax, or 1/πtr. The designer can't touch any of the currents in those frequencies. But above some upper frequency, the chip can operate perfectly well without the currents. Moreover, because those currents might be generating EMI, they can be suppressed, yielding a reduction in EMI.
To limit the currents, insert a ferrite(s) between the decoupling capacitor and the chip's Vcc line(s). Before doing so, though, designers must know that they won't be current-starving the chip. It's always a good idea to tell the chip manufacturer what's intended and get its approval to place the ferrite.
The quality of the pc-board capacitor is usually described as excellent because there's little inductance. As mentioned previously, inductance is the main reason for a capacitor's degradation as frequency increases.
The small size of the capacitance is a cause for concern. A general capacitance value quoted for a board to be effective in supplying currents is greater than 500 pF/in.2 Achieving such values isn't possible with FR4 boards. Values in that range require specialized pc-board design and materials.
EMC Benefits: Apart from the signal-integrity benefits achieved from a well-designed power-distribution system, the pc board will also have lower EMI. As mentioned earlier, this is primarily due to the decrease in the loop area. This appears in two ways. First, Faraday's Law shows the effect that loop area, A, has on voltages induced into the circuit by currents flowing in other circuits:
VINDUCED (volts) = [(µAN/2πd] Χ (dI/dt) Χ cos(θ) (12)
Also, a simplified expression of the electromagnetic fields from the current loops in the digital circuit shows a much lower set of emissions for the circuit with the smaller loop:
E (V/m) = 263 Χ 10-16 Χ [f2A(I/r)] (13)
Cost Benefits: A well-designed power-distribution system can save a lot of money. Equation 14 is a simple formula proving the savings as a function of a parts count reduction (see the Equation Listing). For example, consider a pc-board design that eliminates five capacitors on 400,000 boards, built each year for two years. Assume that it costs $0.006 to place each capacitor on the board. The net savings is about $36,000.
Thus far the discussion has centered around supplying currents to the chips. But the designer may want to limit current to the chips also. Remember that a chip can operate perfectly well as long as it receives the current it needs below an upper frequency, 10 * fmax, or 1/πtr. The designer can't touch any of the currents in those frequencies. But above some upper frequency, the chip can operate perfectly well without the currents. Moreover, because those currents might be generating EMI, they can be suppressed, yielding a reduction in EMI.
To limit the currents, insert a ferrite(s) between the decoupling capacitor and the chip's Vcc line(s). Before doing so, though, designers must know that they won't be current-starving the chip. It's always a good idea to tell the chip manufacturer what's intended and get its approval to place the ferrite.