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High-Voltage Busing Makes Sense

By Stephen Oliver

March 01, 2007

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There are two conflicting ways to increase power-distribution efficiency in data centers as electricity flows between the front-end voltage converter and the ICs on blade servers. One is to lower the bus voltages around the circuit board. The other is to raise them. There are compelling reasons to think that the latter approach is better—if it's done right.

For high-end IT and telecom applications, traditional power conversion involves an ac to 12-V dc silver box followed by 12-V to 1.x-V synchronous buck design. For today's systems and looking ahead to 2010 and the 0.8-V processor core, this traditional approach presents inherent limitations in terms of system power density and efficiency due to a combination of distribution bus losses and fundamental restrictions in topology performance— the pulse-width-modulation (PWM) duty cycle limitation—as processor voltages reach sub-volt levels.

One of the choices is to continue to segment power delivery with incremental, asymptotic improvements— for example, tweaking the VRM input voltages from 12 to 9.6 V or adding another phase. This approach is easy to implement, but it may only net short-term advantages. Alternatively, higher voltages (48 or 350/380 V) reduce distribution losses. Traditionally, though, they have needed extra stages to get down to the processor voltages. So, they have added size and lowered efficiencies in the overall system.

RIDE THE POWERTRAIN
A better approach to using higher voltages is to change the powertrain technology to address efficiency and energy savings concerns. Recent advances in powertrain technology meet growing processor demands by, for instance, eliminating the extra step-down stages and enabling direct 48-V to load conversion.

48-V systems represent the lowest combined (bus/harness and blade/motherboard) distribution loss solutions. Also, the answers to "connectivity" issues such as ORing, hot-swap, connectors, and SELV are already known and understood.

One way to achieve highly efficient higher voltage distribution is by separating or "factorizing" a dc-dc converter's regulation and voltage transformation functions into separate blocks, which can then be optimized for efficiency and power density before being recombined into a flexible, highly efficient system (see figure). There is ample proof that this is viable.

Building-block modules, running at multi-megahertz frequencies, boost efficiency and minimize size. Within the ac-dc power supply, this approach enables unregulated dc-dc converters to provide post-PFC 380- to 48-V voltage conversion with 1000-W/in.3 power density. For the 48-to-processor stage, factorized regulation and voltage transformation provide a compact, efficient solution.

In typical high-end systems, factorizing the power this way can reduce power conversion size by half. However, the real saving is in terms of power drawn from the ac line, as this is the major cost to the user.

Here, lower energy loss (by approximately one-third) means that the system runs cooler, allowing other components to be more efficient and increasing reliability. It also means that less heat must be removed by air conditioning, which itself is inefficient.

With constant pressure to reduce expenses and increasing environmental pressures, new powertrain approaches must be developed and adopted. Taking into account operating duty cycles and the cost of energy per kilowatt hour, considerable savings per processor can be achieved, with the added benefit of reducing CO2 emissions.

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