• Channels
Part Inventory
Go
 
powered by:

 
  • Quick Poll
What Social Networking site do you use the most?



VOTE VIEW RESULTS
Previous Polls

Premium Content

New Signal Chain Technical Papers from Texas Instruments:

 

 

 

Superior JFET Biasing Improves Amplifier Performance


Shyam Sunder Tiwari

November 17, 2008

Print
Reprints Comment Subscribe

An N-channel JFET has a low bias current when its gate is biased negative to the source. However, this requires either that the gate voltage be biased negative with respect to the source voltage or that source voltage be biased positive with respect to the gate voltage. For ac amplifier designs, gate biasing can be made self-biased by using an RC network at the source to hold the positive voltage for a period longer than the time period of the input pulse/frequency source.

In the design described here, the JFET source is constantly biased. Hence, its frequency response is excellent from dc to 10 MHz. This improvement is due to stable diode biasing. Diode biasing exhibits only a 2-mV/°C drop in voltage with increasing temperature from 0°C to 100°C. This is excellent stability.

In this example of a pulsed amplifier design, the signal source has been biased by a 1-GO resistance to ground, and the JFET source is biased using a fast diode, a 1N4148, at a source-drain current of about 5 mA. The gate is maintained at ground potential so that no bias voltage is injected into the input dc circuit. This scheme makes the gate remain at zero voltage unless a signal to be amplified changes it.

This technique is illustrated in the figure, where the input impedance of the circuit is maintained at 1 GO, unless it’s shunted by the impedance of the signal source. The JFET’s output current is kept significantly high—at 5 mA—to let the JFET drain voltage remain at its mid-operating point, about 5 V. This enables the JFET to work for both positive and negative input signals.

In this circuit, a J309 or IFN152 JFET is the most suitable device, with an input bias current of about 100 pA. The amplifier delivers a good signal response to about 10 MHz. A 2N4117A JFET would reduce the input bias current but also reduce the highfrequency response considerably.

This circuit makes an excellent input-stage amplifier for oscilloscopes, where input impedance isn’t greater than 1 MO. The amplifier improves the input stage to 1 GO. The circuit is most suitable for piezoelectric detectors, photodiode-based radiation detectors, and low-capacitance sensors with a very small charge in the range of 10 fC to 1 pC.

Average (0 Ratings):

Subscribe
Subscribe to Electronic Design and start receiving more articles like this one
Filed Under:

Check for price and availability on Source ESB:

Go
powered by  
  • Samuel Kerem
    11 months ago
    Mar 06, 2011

    The quote from the article: "Diode biasing exhibits only a 2-mV/°C drop in voltage with increasing temperature from 0°C to 100°C. This is excellent stability." Lets calculate: 2mv/C over 100C makes 200mV. My question: What makes the author to believe that potential variation of 200mV across Gate-Source is excellent stability?
    What makes the author to believe that the circuit gain is 10? (shown 10mV input -- 100mV output). What is the gain defining element -- is it the 1K resistor? or The JFET transconductance? Am I missing something? The author's claim: "This circuit makes an excellent input-stage amplifier for oscilloscopes" begs for the question how accurate/stable this input-stage amplifier gain is? (but only after the excellent amplifier gain is indeed proofed to be 10). How many %%?

You must log on before posting a comment.

Are you a new visitor? Register Here
Acceptable Use Policy

Sponsored Links