Take Simple Steps Toward Extreme Low-Power Design

Digital outputs generally don’t need any additional configuration. The current consumed will be the pin’s input or output leakage current. Attention must be paid to what’s being powered by the digital output pin. The optimal state should be determined prior to entering a sleep mode. If the external circuit is powered on and off by the microcontroller, be careful that the circuit isn’t back-powered by digital output pins supplying a logic 1. The digital outputs must be set to logic 0 (ground) prior to powering the circuit off.

Unused I/O pins are best configured as digital output pins driving either high or low. Or, they may be configured as an input with an external pull-up or pull-down resistor. However, the pin will draw its input leakage current.

Powering up circuits using these methods and waking up from deep sleep have their implications. When a circuit is powered off for a time, all charges will be drained away. Powering on a circuit will create a short current burst while the circuit comes alive. To mitigate the surge, storage capacitors should be placed on the supply side of the switch.

However, with our knowledge of capacitor leakage, we have to take care in the selection of the capacitor type. Electrolytics are generally known to have high leakage current. Tantalum also has high leakage current, but to a lesser extent than electrolytics. Ceramics provide a good cost-per-performance compromise, delivering both low R_ESR and low leakage.

Many of these circuit ideas may seem incredibly simple and obvious. But designers can enter a mode of thought that’s necessary to grab back all of those nanoamps that have slowly drifted away without doing any useful work. In the end, extreme low-power design raises the bar in terms of both design concept and mindset.