Electronicdesign 7514 0626npbwaitech

3U CompactPCI SBC Passes Final Space-Qualification Testing

June 27, 2014
Now that it’s passed final 100-kRad (Si) testing, Aitech Defense Systems’ SP0 3U CompactPCI single-board computer (SBC) is ready for use in low (LEO) and medium (MEO) orbits, as well as demonstrating high confidence for geostationary orbits (GEO).

Now that it’s passed final 100-kRad (Si) testing, Aitech Defense Systems’ SP0 3U CompactPCI single-board computer (SBC) is ready for use in low (LEO) and medium (MEO) orbits, as well as demonstrating high confidence for geostationary orbits (GEO). Radiation tests for the SBC, performed at the Indiana Univ. Cyclotron Facility (IUCF), used 200-MeV protons designed to test total ionizing dose (TID) and single-event effects (SEE) for particles with linear energy transfer (LET) up to 15 MeV. The SP0’s measured TID met the target 100 kRad (Si) with no latch up or performance degradation. Calculations for SEE sensitivity revealed that the SP0 will be subject to only one single-event functional upset per 1186 days during orbit (any degradation due to SEE mitigation was below the measurement error floor). Using an MPC8458E PowerQUICC-III processor pushes speeds to 1.17 GHz and delivers 333.3 MHz or core complex bus (CCB) and fast DDR1 memory speed, all while consuming a mere 10 W. An e500 system-on-a-chip (SoC) integrates an L1 cache with 32-kbyte instruction and 32-kbyte data plus a 512-kbyte L2 cache. Up to 1 Gbyte of flash comes standard, with an option to expand up to 8 Gbytes. Also included are 512 Mbytes of DRR1 SDRAM (with ECC) and 512 kbytes of redundant boot flash. I/O includes two Gigabit Ethernet ports, four asynchronous serial comm ports, up to five general-purpose discrete I/O channels, as PMC slot, and from four to eight PCIe lanes or four Serial RapidIO lanes, and dual PCI buses.

AITECH DEFENSE SYSTEMS INC.

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