Communication And Common Sense Rule In PCB Design

March 29, 2007
Like many other commodity items that go into system hardware, printed-circuit boards (PCBs) have evolved significantly over the years. Since their invention circa 1936 by Paul Eisler, an Austrian engineer working in England on radio sets, PCBs have

Like many other commodity items that go into system hardware, printed-circuit boards (PCBs) have evolved significantly over the years. Since their invention circa 1936 by Paul Eisler, an Austrian engineer working in England on radio sets, PCBs have served as the central nervous system for most electronics assemblies. They took over when circuit complexity became too much for earlier point-to-point construction techniques.

Along the way, PCBs became substantially more complex, which is largely a function of the nature of the devices they harbor. The EDA industry was largely borne of that growing complexity and the need to automate the process.

For quite a while, it was sufficient for circuit designers to do their job in isolation and then toss the finished product "over the wall" to a PCB designer. Then that designer would toss a Gerber layout file over yet another "wall" to a board-fabrication house.

With the proliferation of large ball-grid-array (BGA) programmable devices, high-density interconnects (HDIs), and timing-critical differential-pair signaling links, such an approach to PCB design is now a roadmap to disaster. Some broad best practices, though, will help ensure successful design without the delays, expense, and aggravation of respins.

CONCEPTUAL STAGE
The first element of PCB design is the concept stage. At this point, circuit designers can, and should, collaborate with PCB designers on technology evaluation. This evaluation will consider such questions as:

  • Which components to use?
  • What packages will they be housed in, and what kinds of pin counts and pinouts would they have?
  • What will the PCB's layer stackup consist of; i.e., how many layers should it have based on cost/performance tradeoffs?
  • What are the performance targets for parameters such as clock frequency and signaling speeds?

At this stage, designers also must consider elements such as the board's bus architecture and whether it will be serial or parallel. They'll also have to consider their impedance-matching strategy, should impedance mismatches cause reflections, ringing, and other undesirable artifacts.

ENTER CONCURRENCY
Many of these concerns raise a key point in successful board design, and that's communication. "PCB design isn't a single-person effort anymore, but a collaborative team effort between groups of engineers," says Ed Duranty, senior applications engineer at Zuken USA.

The theme of communication runs through the PCB design process. Circuit design teams must clearly communicate their design intent to PCB design teams. They also must engage in the process with a clear understanding of what their PCB design tools can and cannot achieve.

"Life can be made much easier, or much harder, for downstream operations as a result of the circuit designers' understanding of what the tools do and what they support," says Duranty.

In addition, due to the rising complexity of board routing and increased signaling rates, PCB design is best approached concurrently as opposed to a traditional serial flow (Fig. 1).

"It's been common for part research and selection to be an isolated phase from the rest of the flow, and likewise the schematic-capture, simulation, and layout stages to be isolated as well," says Bhavesh Mistry, product marketing engineer at National Instruments' Electronic Workbench Group.

Thus, it behooves designers to seek out tools and flows that facilitate data sharing. This is the only way geographically dispersed design teams can leverage parallel efforts and reduce the overall design-cycle time.

DESIGN CREATION
In the design-creation stage, engineers will move into final component selections and creation of their libraries, which in turn facilitates schematic creation. They'll undertake the task of constraint definition and capture as well.

"In this stage, designers are evaluating and selecting building blocks," says Mistry. They'll also head for manufacturers' Web sites in search of datasheets and specs.

"A more advantageous way to approach this," says Mistry, "is to move part selection directly into the schematic capture process." By performing schematic capture in this manner, the process can be used as an experimental canvas of sorts (Fig. 2).

In schematic capture, it's important for designers to be able to quickly add, subtract, or change components, or even the entire design topology. For instance, designers who are developing a speed filter for a mobile handset should set up the passband and other filter parameters during schematic capture by experimenting with various capacitance or inductance values.

While creating the schematic, the PCB design tools also automatically create a netlist for the circuit in the background. That netlist describes how the circuit's components are interconnected and how they will be used by downstream placement and routing tools for board layout.

This is when designers will create symbols and footprints for so-called "megacomponents," such as FPGAs or other programmable devices. It's also when design constraints are captured—a critical step that requires considerable thought, particularly in terms of downstream processes.

"Everything is constrained in PCB design now," says David Wiens, business development director in Mentor Graphics' System Design Division. "It used to be confined to manufacturing issues, but now everything has advanced constraints as we attempt to squeeze boards into small space while still making it manufacturable."

Design requirements may indeed lead to an abundance of constraints, yet it's important not to overconstrain your design. "It's preferable to rely more on simulation and analysis than to simply constrain your design," says Zuken's Ed Duranty. "I've heard engineers say, ‘I know this has worked before so let's do it.' They don't really know if they need a given constraint or not."

During design creation, engineers need to mind signal-integrity concerns that will crop up later in the process. "Signal integrity requires some tackling at the design-capture stage as well as during board layout," says Phil Loughhead, director of product knowledge at Altium. "The design flow has to support that process. You can't tune out the issue of impedance mismatches during design capture."

SIMULATION IS KEY
Once the circuit is designed and a schematic finalized, then comes functional verification. This is usually accomplished through the use of simulation tools. Also, there are various reasons for undergoing a thorough simulation of your circuit. First and foremost, it'll give you a good indication of your circuit's behavior.

"There are misconceptions about simulation," says NI's Mistry. "It's not intended to replace physical prototyping, but rather to eliminate iterations in prototyping." That's because simulation enables designers to pick up on design flaws that typically wouldn't be caught until prototyping.

Simulation makes it easy to experiment with "what-if" scenarios. You can experiment with various design topologies and substitute parts from various vendors to examine their effects on the circuit's performance.

The ever-present rub with simulation, though, is the availability of models, as well as their validity. All of today's commonly used PCB design suites come with expansive model libraries, but there may be times when a given part isn't represented. However, component vendors are increasingly picking up the slack in this regard by making Spice models available on their Web sites, so it's a good idea to check for them.

SIDESTEPPING LIMITS
Spice-based simulation does have its limits—it can produce somewhat idealized simulated signals that aren't necessarily representative of real-world conditions. "A real signal may have elements of noise- and phase-shifting that alter its fidelity," says Mistry.

National Instruments' board-design flow includes virtual instruments, which can be used with the company's array of PXI instrumentation to generate real signals with the attendant nonlinearities intact. Those signals can be captured in a native file format for use in Spice simulation to validate the circuit's behavior. Furthermore, virtual prototyping can help provide feedback into the selection of components (Fig. 3).

It's also crucial that simulation be performed at system level. "It's not just about modeling a signal across the PCB," says Mentor's Wiens. "You also have to examine what the signal does inside of components and even across multiple boards."

A complicating factor is the proliferation of multi-gigabit signaling on PCBs. Serial bus architectures are gaining favor over traditional parallel bus schemes. This requires board designers to cope in simulation with lossy, coupled transmission lines as well as detailed via models.

GETTING PHYSICAL
After simulation runs are used to iron out performance issues, the next step is to lay out the circuit for physical prototyping. A layout ensures that the circuit performs according to design specifications. It also verifies that the board outline matches the design form factor. "Here's where you get into co-design with the mechanical engineers," says Wiens.

The layout stage is the physical manifestation of the interconnects between components defined by the schematic. The task is performed with place-and-route tools provided by any number of EDA vendors. All of these tools bring varying amounts of automation to the table, but that's a double-edged sword.

"Designers need to use judgment on when to use manual layout and when to go automatic," says NI's Mistry. "If you're placing critical components, or when you must place a connector near the edge of the board, you can't give the automatic placement capability the ability to override your decisions."

Hopefully, some forethought will be given to signal-integrity issues when it's time to do the layout. This is the stage at which it must be dealt with in earnest. "The general rule of thumb is that if your signal takes more than one-third of its rise time to get to its destination, then you have a potential signal-integrity problem in that path," says Rob Irwin, product marketing manager at Altium.

CONSTRAINTS ABOUND
Many challenges surround PCB layout. Primary among them is ensuring adherence to constraints. "Today's boards have a high percentage of nets with very complex constraints," says Mentor's Wiens. These constraints can be meant to address signal integrity, manufacturing concerns, electromagnetic-interference issues, thermal issues, or combinations thereof.

"Layout designers have to comply with these rules, but they can conflict at times. The designer has to be highly proficient and aware of what all of the constraints mean," says Wiens.

Aside from design constraints, many factors endemic to today's component technology complicate PCB layout. For one, advanced semiconductor packages such as chip-on-board (COB, or bare die with wire bonds) can make routing a nightmare.

In addition, today's microdense packages can have more than 2000 pins at pitches of less than 0.65 mm. This could wreak havoc in terms of managing I/Os and signal speeds. The creation of escape routing from such packages is tricky, to say the least.

Design with programmable logic is yet another challenge for PCB layout. Some high-end board-design suites, most notably those from Altium and Mentor Graphics, have tight links to those vendors' FPGA design tools and can handle integrated design of the FPGA and the board itself.

"When you have a large FPGA, the pinout tends to come from the FPGA designer, who creates that pinout without much regard for the board layout," says Altium's Irwin. "People are only now beginning to realize that the FPGA, with its programmable I/Os, is a routing resource in and of itself. It's a lot easier to change the FPGA to suit the board layout than it is to change the board to suit the FPGA's I/O setup."

FINAL CHECKS
The last stage before releasing a PCB to manufacturing is a final verification run. Signal integrity and timing must be checked to ensure that signals reach their destinations on time and with sufficient quality. This is the juncture where collisions between design constraints will reveal themselves and tradeoffs are made.

"One of the biggest challenges is trying to move these final verification steps to earlier stages of the design process," says Mentor's Wiens. "A key to being able to do so is having better constraints. If you can perform analysis while specifying constraints during design creation, the constraints will be improved."

At this stage, a final comparison is made between the design specifications and its real-world behavior. The performance of the physical prototype is carefully evaluated so that the effects of the system's operational environment can be well understood and any necessary modifications made.

GETTING IT MADE
Intimately tied with final verification is manufacturing preparation. Hopefully, the members of the design teams have had sufficient communication with the manufacturing house throughout the entire process so they understand the manufacturer's capabilities and limitations.

Manufacturing data must be generated, including all pertinent documentation regarding fabrication, assembly, and test. The panel design is also specified to fabricate them efficiently, minimizing costs. In addition, the manufacturing data must be verified, giving designers one last chance to catch errors.

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