Design Methodology Eases Migration To PLDs

Oct. 29, 2001
To make programmable logic devices (PLDs) attractive for DSP applications, Altera Corp. has developed a new approach to DSP design. With it, the San Jose company hopes to familiarize DSP engineers with programmable logic and its accompanying design...

To make programmable logic devices (PLDs) attractive for DSP applications, Altera Corp. has developed a new approach to DSP design. With it, the San Jose company hopes to familiarize DSP engineers with programmable logic and its accompanying design tools, thereby overcoming major barriers to the use of PLDs in the DSP world.

The approach includes tools, intellectual property (IP) cores, and a comprehensive developer's kit. These items should enable engineers to leverage the flexibility and performance of PLD solutions in signal-processing applications.

"To win more DSP designs, Altera must win over DSP engineers," says Will Strauss, DSP industry analyst of research firm Forward Concepts, Tempe, Ariz. "By developing a design methodology similar to what DSP engineers currently use for traditional DSP processors, Altera is helping DSP engineers easily transfer their design skills to PLDs."

Toward this new approach, Altera is offering a catalog of over 60 parameterizable DSP IP cores, which the maker has been building for nearly eight years. Altera has also crafted a seamless design flow known as DSP Builder for the adoption of PLDs in DSP applications (see the figure).

The DSP Builder software provides an interface between The MathWorks' system-level design tool Simulink and Altera's Quartus II development software. It was developed in partnership with The MathWorks. Justin Cowling, Altera's director of marketing for the IP business unit, says the DSP Builder provides a design methodology that's similar to the system algorithm development, design verification, and debugging tools familiar to the developers of software for traditional DSP processors.

Also, the supplier has readied a comprehensive DSP development kit. Intended for designing, prototyping, and debugging high-performance DSP designs, the Apex DSP development kit comprises a board, system-reference designs, and DSP Builder software. Targeting broadband wireless applications, the reference designs in this kit include high-speed filtering, forward error correction, direct-sequence spread-spectrum (DSSS), and wireless basestation systems.

"It contains everything that a user needs to develop high-performance DSP designs on PLDs," Cowling notes. "Designers can jump-start their designs for broadband wireless applications by using various DSP IP cores and reference designs in hardware prior to licensing them."

There are two types of boards in the Apex DSP development kit. The starter version includes a development board with a 200-kgate PLD (Apex 20K200E-1X), two 10-bit 40-MHz analog-to-digital converters (ADCs), two 10-bit 125-MHz digital-to-analog converters (DACs) and 128 kbytes of external high-speed SRAM. It includes a license for the Quartus II software limited edition, a 30-day evaluation of Matlab and Simulink from The MathWorks, and the DSP Builder software. It costs $995.

Likewise, the professional version includes a development board with a 1.5-Mgate logic device (Apex 20K-1500E-1X), two 12-bit 65-MHz ADCs, two 14-bit 125-MHz DACs, and 256 kbytes of external high-speed SRAM, plus all the necessary development software. It costs $3995.

For more information, point your browser to www.altera.com/IPmegastore.

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