Getting FPGAs On PC Boards Becomes Easier

Sept. 29, 2003
The typical FPGA design cycle will see an average of three to five pinout changes. With FPGA pin counts spiraling past 1500, it's hard enough just to get symbols for these devices represented on a schematic. When you factor in the error-prone...

The typical FPGA design cycle will see an average of three to five pinout changes. With FPGA pin counts spiraling past 1500, it's hard enough just to get symbols for these devices represented on a schematic. When you factor in the error-prone process of accounting for updates to pin assignments, the overhead becomes onerous.

The latest version of Mentor Graphics' FPGA BoardLink goes a long way toward automating the integration of FPGA and pc-board design processes. The tool's automated synchronization quickly updates pin assignments based on place-and-route results.

Enhancements to FPGA BoardLink's interactive symbol creation and fracturing capabilities address burgeoning symbol sizes. With FPGA BoardLink, designers can create custom symbols that are smaller and more manageable. The table-driven fracturing process lets users build symbols based on functionality or pc-board design-team groupings. The fractures are then automatically merged and mapped to the FPGA package for board layout and simulation. BoardLink also automatically create links from the new symbols to those in the corporate library.

FPGA BoardLink is available as a free upgrade to Mentor's pc-board design tool users. Integrated with Mentor's Board Station, Expedition, and FPGA Advantage suites (with DxDesigner links to come), it supports FPGA design tools from Actel, Altera, and Xilinx.

Mentor Graphicswww.mentor.com

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