Electronic Design UPDATE: July 28, 2004

July 28, 2004
Industry View: The Path Toward Analog/RF Subsystem Integration by Paul Kempf, Jazz Semiconductor. Most of the industry press has been emphasizing a trend toward CMOS integration for precision analog and RF circuitry on a system-level chip.
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Electronic Design UPDATE e-Newsletter Electronic Design Magazine PlanetEE ==> www.planetee.com July 28, 2004

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*************************ADVERTISEMENT************************** SPONSORED BY: TRUE CIRCUITS, INC. True Circuits, Inc. offers a family of award-winning clock generator, deskew, low-bandwidth and spread-spectrum PLLs and DDR DLLs that spans nearly all performance points and features typically requested by ASIC and FPGA designers. These high-quality, low-jitter, silicon-proven hard macros are available for immediate delivery in a range of frequencies, multiplication factors, sizes and functions in TSMC, UMC and Chartered processes from 0.25um to 90nm. Call (650) 691-2500 or visit http://lists.planetee.com/cgi-bin3/DM/y/eA0Gl4E70Fh108B30A2 **************************************************************** Today's Table Of Contents: 1. Industry View * The Path Toward Analog/RF Subsystem Integration 2. Focus On Analog * Dual SPDT Switch Has Low On-Resistance, THD 3. News From The Editors * Bus Bridge Speeds PCI-X Data Traffic * IC Programmer Targets Notebook Systems * One Flip-Chip Provides ESD Protection Of 50 Discretes 4. Upcoming Industry Events * IEEE Electromagnetic Compatibility Society Symposium * IEEE Product Safety Engineering Society Symposium * Embedded Software Development Conference * 24th International Display Research Conference and Fourth International Meeting on Information Display 5. Magazine Highlights: July 19, 2004 * Cover Feature: Technology Report -- Analog Front Ends Max Out Performance * Leapfrog: First Look -- Instrument Advances Help Communications Design * Leapfrog: First Look -- Low-Cost FPGAs Spin Out High Performance * Design View / Design Solution -- Using LCD Panels For TVs Takes Technology To The Outer Limits Electronic Design UPDATE edited by John Novellino, Executive Editor **************************************************************** PHOTO ESSAY CONTEST: YOU CAN WIN $500! HURRY! HURRY! AUGUST 6 DEADLINE! Electronic Design presents "A Day in the Life of an Electronics Designer" photo essay contest. Grab your camera and snap away to show the "guts and glory" of you (and your team) at work. We'll publish the winning photos as part of our September 13 YOUR Most Important Issue of the Year, our annual special edition focusing on EE career issues. You can win $500 for best photo series, $250 for best single photo, or $50 if we use any of your photos in the issue. Deadline for submissions is August 6. Be sure to include names and titles of all photo subjects, as well as company name and the type of work-in-process that the photo illustrates. Submit photos digitally to: mailto:[email protected] Or mail to: Mark David, Editor-In-Chief Electronic Design, 45 Eisenhower Drive, Paramus, NJ 07652 Or call Mark at: (201) 845-2467 ***** 2004 BALLOT For Electronic Design's ENGINEERING HALL OF FAME It's time to elect the Class Of 2004 to our Engineering Hall Of Fame. Here's your opportunity to vote for this year's inductees. Our ONLINE BALLOT allows you to vote for as many nominees as you deem worthy and to name your own candidates, too. Go To Zoomerang ==> http://lists.planetee.com/cgi-bin3/DM/y/eA0Gl4E70Fh10BJtY0At ***** BE SURE TO VISIT Electronic Design's Web site, where the power of Electronic Design is a mouse click away! Read our Web exclusives, enjoy our Quick Poll, discover Featured Vendors, access our archives, share viewpoints in our Forums, explore our e-newsletters, and more. TAKE OUR CURRENT QUICK POLL: Electronic Design's editors ask which SYSTEMS TECHNOLOGY you would prefer us to cover more extensively. Go to Electronic Design ==> http://lists.planetee.com/cgi-bin3/DM/y/eA0Gl4E70Fh10BGmZ0Ak **************************************************************** ********************** 1. Industry View -- Exclusive to Electronic Design UPDATE ********************** The Path Toward Analog/RF Subsystem Integration By Paul Kempf, CTO and CMO, Jazz Semiconductor Most of the industry press has been emphasizing a trend toward CMOS integration for precision analog and RF circuitry on a system-level chip. However, a different reality is evident when you take a look at what's inside mainstream electronic products: a number of chips made with different technologies needed to meet real-world requirements. Even the products shipped by the most well known CMOS-only companies typically contain multiple die using different technology generations to meet not only voltage and isolation requirements, but also to balance cost versus performance for each of the subsystem components. In the case of a wireless handset, attempts to integrate part of the analog subsystem into the digital baseband break the link between key system building blocks: power management, mixed-signal, transceiver, RF power control, and power amplifier. The industry roadmap does not provide a technology path for single-chip integration of all analog blocks in advanced CMOS. So while the digital subsystem can absorb the signal-processing requirements for new wireless standards and multimedia functions, integration of the analog subsystem is realizable in a silicon technology optimized to meet the analog and RF requirements at the best cost-versus-performance tradeoff. The current view that standard CMOS will do everything has been fueled by progress in the commercialization of system-on-a-chip CMOS designs for cable modem, Ethernet, Bluetooth, and other applications that require limited mixed-signal functionality in a predominantly digital design with significant signal processing and possibly embedded memory. Dual-gate oxide processes enabled the integration of analog circuits using standard architectures and extended mixed-signal design IP from 350 nm down to 180 nm and even 150 nm. Changes in the electrical characteristics of the thick-gate I/O transistors used for much of the analog circuitry from one generation to the next had only second-order effects. But 130-nm and 90-nm technologies introduced changes to the basic analog performance of the transistor, as well as to the materials used for the gate dielectric and interconnect. As a result, advanced CMOS technologies that provide comparable performance for primarily digital functions can behave very differently for analog functions. Portability of products between technologies, and even between fabs with nominally the same technology, has become more problematic for mixed-signal designs. Second-order parameters that are not routinely monitored make things worse for RF designs integrated in a standard technology optimized for digital performance. A trend toward digitization of analog functionality has mitigated some of these problems, but inefficiencies in adding MIPS to mimic analog circuits grow into power-hungry challenges at radio frequencies. In addition to some interesting firsts that have been demonstrated for CMOS technology, a significant number of breakthrough products that make use of specialty silicon such as biCMOS, silicon-germanium biCMOS, and enhanced RFCMOS technology have been announced in recent months. On the near horizon, the premium board space created by the trend to include wireless local-area network, Bluetooth, TV tuner, and camera functionality in the handset will change the value equation for integration of power management, RF power control, and even power-amplifier blocks with the RF transceiver. System complexity caused by the need for multistandard, multifunction support will clearly result in different device combinations that will benefit from integration. Opportunities to reduce footprint and system cost without sacrificing performance will drive innovation in both analog design and specialty process technology to make it happen. The concept of a single-chip CMOS system for cable modems, Ethernet, Bluetooth, and other applications with physical interfaces that fall readily within the capability of mixed-signal CMOS design is compelling. But there is usually more of the system to consider before claiming single-chip capability. In addition, the mismatch in functional scaling requirements for digital CMOS versus analog/RF technology is growing with each generation of smaller geometry processes. Adding the complexity of full analog/RF requirements to next-generation CMOS platforms is a cost, complexity, and time-to-market burden that few will choose to bear. The basic economics of adding optimized process modules to lagging geometry processes to provide smaller die size for analog/RF functions will determine the success of specialty silicon on the path toward analog subsystem integration. Paul Kempf is chief technical officer and chief marketing officer of Jazz Semiconductor, Newport Beach, Calif. He can be reached at mailto:[email protected] To comment on this Industry View, go to Reader Comments at the foot of the Web page: Electronic Design UPDATE ==> http://lists.planetee.com/cgi-bin3/DM/y/eA0Gl4E70Fh10BKBB0Ah **************************************************************** *************************ADVERTISEMENT************************** LSI Logic's RapidChip Platform ASIC Seminar Join LSI Logic and Synplicity for an FREE Platform ASIC seminar at a location near you. Learn the rationale for and scope of support behind RapidChip(TM) platform technology, in conjunction with Synplicity's Amplify RapidChip custom physical synthesis solution. RapidChip reduces design time, increases productivity, reduces risk, and lowers design costs,regardless of your application and specialization. Seating is limited for this popular event, so check locations, dates and register now at: http://lists.planetee.com/cgi-bin3/DM/y/eA0Gl4E70Fh10BKBC0Ai **************************************************************** ********************** 2. Focus On Analog ********************** ***Dual SPDT Switch Has Low On-Resistance, THD The FSA2257 dual single-pole double-throw (SPDT) analog switch offers bidirectional operation, allowing use as either a multiplexer or demultiplexer by select pins. The device's performance and small size suit it well for portable audio designs. A typical on-resistance of 0.95 ohm reduces power consumption. Total harmonic distortion is only 0.002%, and operating range is a broad 1.65 to 5.5 V. Electrostatic discharge performance is 8 kV (using the human body model). A leakage current of only 2 nA and a low charge injection of 20 pC, max, minimize offset error in signal sample-and-hold applications. The switch comes in a 10-terminal leadless MicroPak (L10X suffix) on 500-piece tape-and-reels compatible with standard high-speed manufacturing equipment. It is lead-free and complies with the joint IPC/JEDEC standard J-STD-020B and with European Union requirements effective next year. The FSA2257 costs $0.75 each in lots of 1000 and is available four weeks after ordering. Fairchild Semiconductor ==> http://lists.planetee.com/cgi-bin3/DM/y/eA0Gl4E70Fh10BKBD0Aj ********************** 3. News -- From The Editors ********************** ***Bus Bridge Speeds PCI-X Data Traffic The PI7C21P100 bus bridge facilitates faster connectivity between PCI-X buses while supporting the full 64-bit/133-MHz specification for PCI-X. On top of that, it's backward-compatible from conventional PCI down to 32 bits/33 MHz. The two-port bus is pin-compatible with previously released bridges. Capabilities include dynamic prefetching control, configurable free space in the memory data FIFO, and 5-V tolerance in support of legacy products. Also, its high bandwidth helps eliminate the bottleneck of enterprise I/O-heavy systems. The PI7C21P100 PCI-X to PCI-X bridge can be used on cards that pack quad Gigabit Ethernet ports, quad Fibre Channel ports, dual and quad SCSI RAID controllers, high-end video/imaging systems, single-board computers, and many other applications. The bridge chip includes asynchronous mode support, and it can handle six secondary bus masters and up to eight active transactions in each direction. Housed in a 304-pin HPBGA package, the chip costs $55 each in lots of 1000. Pericom Semiconductor Corp. ==> http://lists.planetee.com/cgi-bin3/DM/y/eA0Gl4E70Fh10BKBE0Ak ***IC Programmer Targets Notebook Systems The Model 866 universal device programmer works with a standard parallel printer port or a USB port (USB 1.1 and USB 2.0), making it suitable for programming, reprogramming, test, and repair of memory devices using most computers, including notebooks. It comes with a library of 12,438 devices (9734 supported via USB). An included 48-pin ZIF socket eliminates the need for an adapter for any DIP device up to 48 pins. An extensive line of socket adapts is available to connect the programmer to just about any type of IC package. A built-in in-circuit serial programming (ISP) connector allows users to program ISP chips in-circuit. The Model 866 is available for immediate delivery and costs $995 with a power supply and parallel cable. B&K Precision Corp. ==> http://lists.planetee.com/cgi-bin3/DM/y/eA0Gl4E70Fh10BKBF0Al ***One Flip-Chip Provides ESD Protection Of 50 Discretes A flip-chip array that measures only 2.5 mm square and 0.65 mm high can eliminate up to 50 discrete components used to protect LCD interfaces from destructive electromagnetic fields and electrostatic discharges, according to its manufacturer. The LX7207 is a 5-by-5 array that supports up to 10 lines of integrated low-pass filters. It is equally suited for data-port and data-line protection in wireless handsets, notebook computers, PDAs, MP3 players, and portable terminals. Filter response is characterized to 6 GHz with more than 30-dB attenuation in the 800- to 1000-MHz range and 20-dB attenuation in the common wireless local-area network bands at 2.4 GHz and 5.0 to 6.0 GHz. The LX7207 costs $0.68 in quantities of 1000 to 5000. Samples and production quantities are available immediately. Microsemi Corp. ==> http://lists.planetee.com/cgi-bin3/DM/y/eA0Gl4E70Fh10BKBP0Av ********************** 4. Upcoming Industry Events ********************** Aug. 9-13, IEEE Electromagnetic Compatibility Society Symposium (EMC2004) Santa Clara, Calif. http://lists.planetee.com/cgi-bin3/DM/y/eA0Gl4E70Fh10BKBG0Am Aug. 13-15, IEEE Product Safety Engineering Society Symposium Santa Clara, Calif. http://lists.planetee.com/cgi-bin3/DM/y/eA0Gl4E70Fh10BKBH0An Aug. 17-19, Embedded Software Development Conference San Jose, Calif. http://lists.planetee.com/cgi-bin3/DM/y/eA0Gl4E70Fh10BIPX0AH Aug. 23-27, 24th International Display Research Conference and Fourth International Meeting on Information Display Daegu, Korea http://lists.planetee.com/cgi-bin3/DM/y/eA0Gl4E70Fh10BKBI0Ao ********************** 5. Magazine Highlights ********************** In case you missed them, here are some of the high points of our most recent issue. July 19, 2004: * Cover Feature: Technology Report -- Analog Front Ends Max Out Performance These mixed-signal chips fit their target applications like a glove, speeding up system design and ultimately time-to-market. http://lists.planetee.com/cgi-bin3/DM/y/eA0Gl4E70Fh10BKBJ0Ap * Leapfrog: First Look -- Instrument Advances Help Communications Design One company's horde of signal sources, enhanced analyzers, power meters, and connectivity test sets splashes down on IMS http://lists.planetee.com/cgi-bin3/DM/y/eA0Gl4E70Fh10BKBK0Aq * Leapfrog: First Look -- Low-Cost FPGAs Spin Out High Performance Leveraging 90-nm process rules and a logic architecture that minimizes chip area, the Cyclone II FPGAs deliver a cost-sensitive, high-performance solution. http://lists.planetee.com/cgi-bin3/DM/y/eA0Gl4E70Fh10BKBL0Ar * Design View / Design Solution -- Using LCD Panels For TVs Takes Technology To The Outer Limits http://lists.planetee.com/cgi-bin3/DM/y/eA0Gl4E70Fh10BKBM0As For the complete Table of Contents, go to Electronic Design ==> http://lists.planetee.com/cgi-bin3/DM/y/eA0Gl4E70Fh10BKBN0At **************************************************************** YOUR CHANCE TO WIN $500! Take our ISSUE POLL and win a $500 gift certificate. The editors would like to know what you think of the JULY 5 ISSUE of Electronic Design. Your feedback will help us better understand your critical information needs and provide valuable guidance for developing future editorial content. It's also your automatic entry into our drawing for a $500 American Express gift certificate. Go to ==> http://lists.planetee.com/cgi-bin3/DM/y/eA0Gl4E70Fh10BKBO0Au ****************************************************************

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