Last year, I predicted that two things would happen in 2012. First, I suggested that the hybrid, combined use of TLM simulation and the various ways to execute RTL (including hardware-assisted verification) would find further adoption. Second, I thought that more TLM modeling would be used in the FPGA space in which both main vendors were providing virtual prototyping solutions for their new FPGAs containing dual ARM subsystems. So, what happened?...
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