Ballistic Nanotransistor Should Yield Smaller And Faster Silicon Chips

March 6, 2000
Researchers at Lucent Technologies' Bell Labs, Murray Hill, N.J., have developed a method to significantly improve the flow of current in nanoscale transistors. This characteristic may help the semiconductor industry continue making smaller and...

Researchers at Lucent Technologies' Bell Labs, Murray Hill, N.J., have developed a method to significantly improve the flow of current in nanoscale transistors. This characteristic may help the semiconductor industry continue making smaller and faster silicon chips.

These nanoscale devices have been dubbed "ballistic nanotransistors." The name comes from the device's virtually unimpeded flow of current, which is similar to a bullet whizzing through the air. A ballistic nanotransistor is roughly four times smaller than today's transistors.

To increase silicon-chip performance, the semiconductor industry generally decreases transistor size, which increases the switching speed. But one transistor component, the insulating layer, is expected to limit this continued shrinkage since a short circuit will occur when it becomes too thin. The insulating layer lies between the transistor's gate, which turns the current on and off, and the channel, through which current flows.

To overcome the limitations posed by the insulating layer, the Bell Labs researchers decided to tackle another major factor that limits a transistor's speed—the resistance encountered by current as it flows through the channel. In today's silicon-based transistors, only 35% of the input current flows from a transistor's "source" to its "drain" via the channel. The remainder scatters as it collides with the insulating layer's rough edges.

Bell Labs researcher Greg Timp, who presented his research findings in December at the International Electron Devices Meeting, compared the electrons going through the channel to a ball going through a pinball game. "In our device, we not only made the channel very short to minimize the channel resistance, but we also removed nearly all the 'pinball bumpers,'" he said.

This was accomplished by making the insulating layer smoother than it is in conventional transistors. This resulted in 85% of the current being transmitted from the source to the drain, which yields the ballistic transport. The Bell Labs nanotransistor has a 40-nm gate and a 25-nm channel length (see the figure, a).

Although other researchers have attained ballistic effects in nanotransistors, the devices needed to be cooled to nearly −200°C to reduce the scattering; or, exotic materials were used. "This is the first ballistic nanotransistor that operates at room temperature with conventional silicon technology," Timp said.

Several key elements were involved in creating the ballistic nanotransistor. Timp and his colleagues used an unconventional process known as rapid thermal oxidation to "grow" the insulating layer, or gate oxide, on the silicon wafer. This process adds oxygen to silicon at 1000°C for 10 seconds, resulting in a smooth interface between the silicon wafer and the gate oxide.

During the testing process, Timp and his colleagues came upon a counterintuitive finding, which may have implications for the semiconductor industry. At first, the researchers tested nanotransistors with gate oxides that were only 1.2 nm thick (see the figure, b). The drive current efficiency was about 75%. But a computer simulation of a slightly thicker gate oxide, 1.6 nm, predicted an 85% efficiency. This was odd since thicker gate oxides typically hinder current flow. Experimental results confirmed the prediction, which may ease the industry's need for making thinner gate-oxide layers. Today's average layer is 2.8 nm.

"It appears that electrons travel better when the gate oxide is slightly thicker, because the electrons are not as attracted to the gate, which is directly above the gate-oxide layer," Timp concluded.

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