The U.S. Navy, always seeking paths to reduce the size, weight, and power (SWaP) of systems, took another step in that direction with the FlexVPX concept, which was developed at its U.S. Naval Research Laboratory (NRL) under the sponsorship of the Office of Naval Research (ONR). The FlexVPX solution allows users to subdivide the large dimension of the backplane into smaller backplanes while maintaining a high-speed data path between the backplanes via the PCI Express (PCIe) switch.
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These smaller, modular backplanes need not be coplanar, which increases flexibility in the physical packaging of the processing hardware. With FlexVPX, users retain the functionality of the larger, traditional backplane, yet can now operate within limited physical spaces of embedded military and commercial systems.
The modular nature of the FlexVPX backplane also allows users to append a specialty backplane to a backplane in use. For instance, suppose the need arises for a fiber-optic link to interface with a legacy backplane. A FlexVPX backplane can be designed to implement the VITA 82 standard. The new backplane could then be mounted with the user’s current backplane, thus incorporating the new capability into the legacy system.
Commercialization of FlexVPX by 4DSP resulted in backplanes that lets systems engineers capitalize on the established VPX ecosystem while improving system SWaP profile. The ability to interconnect two- and three-slot 3U VPX-compliant backplanes opens up new options by allowing for custom system configurations using COTS hardware. All FlexVPX backplanes come with multi-port PCI Express bridges that accelerate throughput for point-to-point communication between different elements in the system. High-speed cables can plug directly into the rear of the backplane connectors, enabling backplane-to-backplane communication with tens of gigabits throughput (Figs. 1 and 2).
FlexVPX backplanes provide best-in-class computing options for sonar/radar, satellite communications, and software-defined radio systems when used with 4DSP’s 3U VPX FPGA carrier cards (VP680, VP780, VP788 and VP796) that integrate Xilinx Virtex FPGAs. With the option to build multi-slot solutions using desktop and mobile VPX chassis, such as the company’s six-slot desktop VPX360 or ruggedized VPX362 enclosures (Fig. 3), users can design a range of systems with a small footprint, ruggedization, and high performance.
Advantages of PCI Express
OpenVPX addresses the interoperability issues between VPX boards and backplanes from multiple vendors at a system level. It enables system design and implementation utilizing fabric technologies such as Ethernet, Serial RapidIO, and PCI Express (PCIe). PCIe, for example, works particularly well in OpenVPX systems. When used with a 3U single-board computer (SBC) incorporating an Intel processor, a backplane with a PCIe switch, such as 4DSP’s FlexVPX VPB603, benefits from the fact that PCIe is native to Intel chipsets. This minimizes both footprint and power consumption. The PCIe implementation of the VPB603 is shown in the block diagram (Fig. 4).
Though adding a network interface controller on a 3U SBC to enable Ethernet, Serial RapidIO, or InfiniBand may mean subtracting another desirable feature, an integrated chipset on a single-processor SBC natively offers PCIe connectivity. PCIe is also well-suited for the OpenVPX data, control, and expansion planes. It can connect processors to peripherals through the expansion plane at high data rates. PCIe provides up to 16 lanes of I/O, from ultra-thin to fat pipes, offering up to four times more bandwidth (8 Gb/s) than InfiniBand and Serial RapidIO.
OpenVPX
FlexVPX relies on OpenVPX (VITA 65), which enables the interoperability of products from different vendors. The major advantage of OpenVPX is that it’s not limited to a single fabric technology or connector type. It supports a variety of technologies and speeds through the use of profiles. As newer technologies are introduced and established in the marketplace, they can be incorporated into the list of supported profiles. OpenVPX builds upon the VPX (VITA 46.0) standard, which goes beyond traditional VMEbus connectors to combine newer connectivity and packaging formats with more powerful, higher-speed bus and serial technology.
OpenVPX’s flexibility improves the efficiency of VPX-based systems and subsystems development by reducing the amount of required customization and testing. Its focus on performance and interoperability at a systems level diminishes the amount of custom backplane and chassis development necessary for a given application. As a result, system designers can put more of their limited development resources toward the demanding requirements of their programs while bringing down project costs, raising quality, and shortening time to market. In particular, OpenVPX supports the rapid development and deployment schedule requirements of modern defense-related projects.
The OpenVPX standard was developed to identify module requirements and backplane capabilities. The guidelines set out by OpenVPX enable modules from different vendors to be more easily integrated into a system’s environment. It assures that the necessary functions of modules, backplanes, and chassis are compatible with each other. OpenVPX establishes a framework to guide and manage module and backplane design by defining pinouts and setting interoperability points within VPX. Of course, improved interoperability means that boards and modules fit together predictably. In addition, OpenVPX’s flexibility allows designers to choose how these interconnections are made as well as optimize the system’s connectivity for their application.
While capitalizing on VPX’s large number of I/O pins and high-speed serial fabrics, OpenVPX limits combinations to system profiles to increase interoperability between modules from different vendors within the same backplane. The standard also incorporates control, data, and management planes to improve system maintainability and allow manufacturers to adhere to common I/O routings. The assignment of VPX pins to functional planes also provides opportunities for application-specific customization.
OpenVPX simplifies the issue of interoperability between systems by giving VPX modules and backplane slots definitions that ensure similar modules can be used with particular slot configurations. The backplane configuration definitions specify their slot profiles, including information on data rate, routing topology, and fabric type. This makes it easy to determine that a card from one vendor can be used in the same backplane slot as a card from another vendor when the modules have a common slot profile.
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Slot types include payload, peripheral, switch, and storage. The standard allows for such backplane topologies as star, mesh, ring, and bridged. Other requirements outlined by OpenVPX include specifications for the utility plane, power distribution, system control signals, reference clocks, and the GPIO signals. The part-number format provides more information (such as signal speed) on the control and fabric planes.
VPX Growth
VPX represents the next step in best-in-class technologies that provide for a long technology cycle, much like the original VMEbus format that came to prominence in the embedded market in the early 1980s. The effort to develop the higher I/O bandwidth level offered by VPX was driven by the need to tap the huge processing-power increases that have emerged in parallel embedded computing. VPX established a foundation for the next generation of systems that take advantage of plentiful features and a surplus of headroom to power modern electronic weapons and embedded defense systems.
In 2013, industry analysts at IHS estimated that revenue generated by VPX boards and systems will match industry spending on VME-based technology by 2016, as sales of the older technology continue to decline. Since the first VPX products were introduced in 2007, the technology has established itself primarily in defense programs that require high performance and ruggedized computing solutions.
Defense applications account for the vast majority of VPX revenue, but 4DSP and some of the more than 40 other VITA members are increasingly designing ruggedized VPX systems for commercial applications in aerospace, transportation, and other industrial sectors. All told, the number of VPX products registered with VITA more than tripled between 2010 and 2014 (Fig. 5).
Pierrick Vulliez, CTO and founder of 4DSP LLC, holds an MSEE from ESIEE, Paris, France.
Michael Harmon is a senior electronics engineer in the Tactical Electronic Warfare Division, Naval Research Laboratory (NRL) in Washington, D.C. He received an MSEE from Johns Hopkins University, and a BSEE from the University of Maryland, College Park.