The VMEbus International Trade Association (VITA) has voted to move two working group draft standards into the ANSI (American National Standards Institute) process. The first draft standard, VITA 41.0, VXS, is the base-level draft standard for the latest enhancement to the VMEbus. VXS specifies a high performance, differential P0 connector that allows the integration of high-speed serial fabrics combined with the real-time/hard deadline performance of the VMEbus. For the first time, this allows a standardised methodology of integrating high-speed serial data pipes to high-performance VMEbus-based systems.
The second draft to be forwarded to ANSI is a revision to an existing standard, ANSI/VITA 20, Conduction Cooling for PMC. Ivan Straznicky of Curtiss Wright Controls, Embedded Computing, and chair of the working group, started the effort to provide a method for dealing with possible connector fretting. The working group began in January of this year and was able to move the revisions into the ANSI process in only 7 months. "The recommended changes were straight forward and after discussion and one ballot the working group was able to reach consensus. This change will improve what was already a valuable standard for conduction cooled PMC," said Straznicky.
New conference VITA has also launched a new trade conference targeted at the military embedded electronics market. The Military Embedded Electronics and Computing Conference (MEECC) will be a two-day event in southern California in spring 2005.The conference developers have recruited Pete Yeatman to preside as program chairman. Yeatman is an industry consultant, publisher of COTS Journal and a long-time proponent of establishing an independent conference for this market segment.
Ramtron International's FM25W256 256Kbit wide voltage operation non-volatile ferroelectric random access memory (FRAM) with a serial peripheral interface (SPI) is claimed by the company to be the highest-performance SPI memory available with 25MHz NoDelay writes and offers an unlimited number of read/write cycles.