; William Grill ; Honeywell Aerospace ; ; 8 pin voltage monitor 12/03/08 ; coded to support tolerance < (0.25% * Vref) -1 ; 2 low true outputs ; Areg,4= Vr-tolerance > Vin < Vr+tolerance Areg,5=Vin < Vr+tolerance ; OPTIONR equ 1 OSCCON equ 0x10 Areg equ 5 STATUS equ 3 #define Carry STATUS,0 #define z STATUS,2 #define ZERO STATUS,2 PC equ 2 ADCON0 EQU 0x1F ADCON1 EQU 0x9F WPU equ 0x95 ADRESH equ 0x1E ;bank1 ADRESL equ 0x9E ; cnt equ 0x20 bits equ 0x21 #define half bits,0 ;#define sourcepassed bits,1 temp1 equ 0x22 temp2 equ 0x23 temp3 equ 0x24 temp4 equ 0x25 tempL equ 0x26 tempH equ 0x27 ; tolerance equ 0x30 A1lowh equ 0x32 A1lowl equ 0x33 A1hih equ 0x34 A1hil equ 0x35 ; temp equ 0x2C mask equ 0x2D ; #define a0LEDpass Areg,4 #define a0LEDfail Areg,5 ; initlz: ; movlw 0x81 ; 10xx. 0001 rt shift chan 0 movwf ADCON0 ;bank1 bsf STATUS,5 movlw 0xF ; 0000 1111 movwf Areg movlw 0x80 movwf OPTIONR ; pullup disabled movlw 0x43 ; 2 analog movwf ADCON1 ;movlw 0x60 ; 4 MHZ ;movwf OSCCON movlw 4 movwf WPU nop nop ; bcf STATUS,5 ;bank0 movlw 0x81 ; start by pointing to +Vref volt input movwf ADCON0 ; 00.00.0001 movlw 0x10 movwf Areg ; evaluate limits loop: bsf ADCON0,1 ; start conversion nop loop1: btfsc ADCON0,1 ; test/wait until ADdone goto loop1 ; movfw ADRESH ; save results movwf tempH bsf STATUS,5 ; bank1 nop movfw ADRESL nop bcf STATUS,5 movwf tempL movlw 0x85 ; start by pointing to +v under test movwf ADCON0 ; 1000.0101 movfw Areg movwf temp rrf temp rrf temp,w andlw 3 movwf tolerance call tolerancemask ; retrieve correct tolerance mask movwf mask call calclimits ; using mask and ref values calculate/allocate limit offset ; evaluate value inder test bsf ADCON0,1 ; start conversion nop loop2: btfsc ADCON0,1 ; test/wait until ADdone goto loop2 movfw ADRESH ; save results movwf tempH bsf STATUS,5 ; bank1 nop movfw ADRESL nop bcf STATUS,5 movwf tempL movlw 0x81 ; re-point to +Vref input movwf ADCON0 ; 1000.00.01 ; start compare movfw A1hih ; move all test unique constants to an array of registers movwf temp4 movfw A1hil movwf temp3 ; movfw A1lowh ; move all test unique constants to an array of registers movwf temp2 movfw A1lowl movwf temp1 ; movfw temp4 subwf tempH,w btfss Carry goto test1a ; limit msB is == or > btfss ZERO goto fail1 ; upper fail movfw temp3 subwf tempL,w btfss Carry goto test1a btfss ZERO goto fail1 ; upper fail ; uppper limit OK test1a: bcf Areg,5 ; assert below max trip ; subtract A/D from lower limit movfw tempH subwf temp2,w btfss Carry goto pass1 btfss ZERO goto lfail1 ; lowr fail only ; lower limit msB == A/D movfw tempL subwf temp1 btfss Carry goto pass1 btfss ZERO goto lfail1 ; lowr fail only ; bcf Areg,4 ; goto loop pass1: ; upper and lower pass movlw 0xF andwf Areg goto loop lfail1: bsf Areg,4 goto loop ; upper fail fail1: movlw 0x30 iorwf Areg ; upper fail-> both off goto loop ; *************************** tolerancemask: addwf PC retlw 0xA0 ; 2% mask retlw 0xB0 ; 5% mask retlw 0xD8 ; 10% mask retlw 0xCC ; 20% mask calclimits: movlw 8 movwf cnt clrf temp1 clrf temp2 bcf half btfss tempH,1 bsf half intersum: bcf Carry rrf tempH rrf tempL rrf mask btfss Carry goto inter2 inter1: movfw tempL addwf temp1 inter2: decfsz cnt goto intersum ; temp1 has offset btfsc half incf temp1 movfw temp1 bsf STATUS,5 ; bank1 addwf ADRESL,w bcf STATUS,5 movwf A1hil btfsc Carry incf ADRESH movfw ADRESH movwf A1hih ; movfw temp1 bsf STATUS,5 ; bank1 subwf ADRESL,w bcf STATUS,5 movwf A1lowl btfss Carry decf ADRESH movfw ADRESH movwf A1lowh retlw 0 end ; ***************************