Precision Analog 32-bit Micro Uses A Crossbar Interconnect

March 18, 2012
Silicon Labs is entering the 32-bit fray with its SiM family based Arm's Cortex-M3 architecture.

Silicon Labs is well known for its precision analog microcontrollers based on the 8-bit 8051. Silicon Labs' new SiM series moves its microcontroller peripheral set into the Arm realm. The 80MHz SiM family is based on the 32-bit Cortex-M3.

The family starts with two flavors. The SiM3U includes USB 2.0 support (Fig. 1). There is on-chip USB termination eliminating off-chip components. The SiM3C is less expensive with prices that start at $2.20 but foregoes the USB interface. Both have a 16-channel DMA and support up to 256 Kbytes of flash and 32 Kbytes of RAM. They come in five different package types starting with a compact 6mm by 6mm chip.

4 Kbytes of the RAM is preserved in low power sleep mode. The processor can even run applications from RAM allowing flash to remain powered down. The chip uses less than 100nA in sleep mode when not using the real time clock (RTC) and 350nA with the RTC.

Figure 1. The SiM3U starts with a Cortex-M3 core and provides a range of precision analog interfaces.

Analog peripherals are designd to operate over the entire voltage and temp range specified for the chips. The chips have a pair of comparators, two 10-bit DACs and two 12-bit ADCs. The comparators use only 400nA with a 150ns response time. The 28-channel ADCs have a 64 entry sample queue and a programmable autoscan feature that does not require processor control. In this interleaved mode the ADCs can deliver 2 Msamples/s. A circular buffer allows the 10-bit DAC to deliver 12-bit performance. The system has reference voltages of 1.2V, 2V and 4V. The system supports up to 16 capacitive touch interfaces.

The chip has a built-in 5V regulator. There is also a 3V linear regulator that can provide external power reducing external parts in many applications. The is also an on-chip DC-DC controller that can also be used with some external components.

The chips use a crossbar interconnect architecture (Fig. 2) to link peripherals to pins providing more flexible PCB layout. There are two digital interconnects and one for the analog peripherals. I/O cannot be mapped to any pin but the architecture provides a variety of options for every peripheral.

Figure 2. Dual crossbar interconnects allow interfaces to be linked to a variety of pins providing flexible PCB layout.

Digital outputs include six high drive, 300mA pins. These can be configured as a boost converter output. They can also be linked to PCA (programmable counter array) the includes PWM and timer support.

Communication peripherals include UARTs, I2C and SPI interfaces. There is hardware AES encryption support. The chips have I2S audio outputs.

The SiM family has a flexible clock system capable of running without a crystal including USB support. It has fast PLLs that lock in 3 clock cycles. This provides fast wake up. It can even use a 32 Khz watch crystal to generate the 80 MHz clock.

Silicon Labs has an Eclipse-based IDE. It employs Silicon Labs plug-ins include a dashboard that delivers news and app notes to users. The AppBuilder tool lets developers choose peripheral configurations, clock modes, and pinouts. It then generates source code and chip designation.

Developers can also choose from an array of third party software tools. Keil and IAR support the SiM family.

The Cortex-M3 architecture has become extremely popular with support from numerous vendors. Entering this market at this point is a challenge but one where Silicon Labs brings significant advantages in peripheral performance as well as reduced bill of materials (BOM). The market is migrating from 8-bit to 32-bit platforms and Silicon Labs' customers will be able to do so with top notch peripherals.

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