Leuven, Belgium: Nanoelectronics research centre Imec released an early-version process development kit (PDK) for 14nm logic chips. According to the centre, it’s the first to address the 14nm technology node. The PDK, made available to Imec’s partners, will be followed by incremental updates. Imec and its partners are developing a 14nm test chip to be released later this year.

The PDK targets the introduction of new key technologies at the 14nm node. The main example involves the use of FinFET transistors, which have a larger drive-per-unit footprint and higher performance at low supply voltages compared to traditional planar technologies. This first 14nm PDK contains all of the elements for design assessment of the 14nm node through device compact models, parasitic extraction, design rules, parameterised cells, and basic logic cells.

Evolutions of the PDK will gradually introduce the use of high-mobility channel materials. It includes elements of both immersion and EUV lithography, opening the way for a gradual transition from 193nm immersion to EUV lithography.

The kit was developed within the framework of Imec’s INSITE program and together with all of the partners involved in this affiliation program. Through the INSITE program, Imec offers its partners early insight into emerging technologies, which means companies can anticipate forthcoming developments and start designing at an earlier stage for future systems and applications.