Design Package Assists In Configuring High-Speed PCI-X Bus Architecture

May 29, 2000
TymeWare PCI-X is a design package created to assist ASIC and FPGA designers developing PCI-X bus architectures. The package comprises a PCI-X 1.0-compliant synthesizable core, which is a set of RTL synthesizable building blocks and a bus-test...

TymeWare PCI-X is a design package created to assist ASIC and FPGA designers developing PCI-X bus architectures. The package comprises a PCI-X 1.0-compliant synthesizable core, which is a set of RTL synthesizable building blocks and a bus-test environment. The entire package builds on technology that's been proven in more than 200 core-based PCI designs.

Introduced last fall to supplant the PCI specification, the PCI-X bus architecture is expected to fulfill demands for higher-performance and backward-compatible I/O solutions in several applications. These include multiprocessor servers, Gigabit Ethernet, Fibre Channel, and embedded networking. It accommodates designs for systems and devices that can operate at speeds significantly higher than the current PCI standards. PCI-X is backward-compatible with the PCI local bus 2.2 specification. For this reason, it also permits devices to operate at conventional 33- and 66-MHz bus speeds. The design package supports up to 32 split transactions, boosting system performance with more efficient data transfers.

At 133 MHz, the PCI-X core enables over 1-Gbit/s throughputs. Configurable features include split transactions, base-address registers, PCI power management, multifunction devices, message-signaled interrupts, and an EEPROM-configuration interface. With its Rapid Script configuration tools, the TymeWare PCI-X design package allows users to add or remove various features—depending on the design's complexity and performance requirements.

The design package offers a PCI-X test environment that contains behavioral models of PCI-X/PCI 2.2 master and target devices, and a PCI-X/PCI 2.2 arbiter to control bus access. It also detects and reports any PCI-X/PCI 2.2 protocol and timing violations. In addition, a compliance test suite is provided to verify that functionality meets with PCI-X and PCI 2.2 specifications.

The complete TymeWare PCI-X comprises the PCI-X core and test environment (in Verilog source code), synthesis scripts, compliance test suites, documentation, technical support, and a three-day training class. It is available now. Sample core designs for evaluation purposes can be downloaded at www.in-silicon.com.

TymeWare PCI-X inSilicon Corp., 411 E. Plumeria Dr., San Jose, CA 95134; (408) 570-1000; fax (408) 570-1001; www.insilicon.com.

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