Process-Aware DFM Tools Tackle Process-Related Variation

Oct. 24, 2006
With semiconductor feature sizes continuing to shrink, the variability arising from process technologies such as strained silicon, as well as the manufacturing processes themselves at 45 nm and below, is increasingly affecting circuit performance. Designe

With semiconductor feature sizes continuing to shrink, the variability arising from process technologies such as strained silicon, as well as the manufacturing processes themselves at 45 nm and below, is increasingly affecting circuit performance. Designers need to know during the design process how to account for these effects.

Synopsys has launched a line of process-aware design-for-manufacturability (DFM) tools that analyze variability effects at the custom/analog design stage for 45 nm and smaller. These tools link the manufacturing-variation data back to the design process, enabling users to optimize physical design. They also allow custom designers to realize the full potential of technology scaling and, in turn, to expand the latitude for yield maximization.

There are two core members of what Synopsys is calling its PA-DFM family. One, Seismos, simulates and analyzes changes to transistor characteristics due to proximity variations arising from stress and well effects on design layouts. The other, Paramos, extracts process-aware Spice parameters for detailed analysis of the impact of global variations at the circuit level.

Seismos gives early adopters of the 45-nm node the ability to analyze parametric variations caused by proximity effects, such as the impact of layout on transistor stress states. Users can do "what-if" analysis on the design to interactively assess the effects of layout changes on the stress, which in turn affects the transistors' mobility. The models used by Seismos are based on rigorous T-CAD simulations validated by silicon data.

Paramos links Spice models directly to manufacturing conditions by extracting process-aware Spice compact models that combine calibrated T-CAD simulations and global Spice extraction. It enables users to simulate the impact of process variability (statistical or systematic) on circuit performance. Users gain a physically-based variation model for statistical timing simulations of circuit performance, which enables them to explore their design's sensitivity to real physical process parameters.

The PA-DFM tools are built with an emphasis on an evolutionary approach, which is to say that they provide for integration with users' existing design infrastructure.

Contact Synopsys directly for pricing and availability information.

Related Links Synopsys
www.synopsys.com

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