The reusable hardware platform, bristling with a range of processor architectures, is becoming commonplace. But even as processor vendors tout their latest multicore offerings, the effective programming of these complex devices remains an open question.
Academia will rise to the challenge with expansive programming models and methodologies in the future. In the meantime, the widening programmability gap threatens to choke design productivity. Let’s examine the brave new multicore world.
New? Multicore architectures have been around for decades. Their mainstream adoption in the hands of ill-equipped software developers is all that’s new. Brave? Issues such as dependency problems, communication overhead challenges, synchronization traps, memory contentions, and numerous others make bravery a necessity.
Software developers using a multicore front end reveal a unique perspective on the range of programming pitfalls and issues they encountered, but we must not assume that they are in limbo. Engineers are making the existing C/C++ language and available tools work. Their multithreaded code may not be optimal, and the same mistakes are being repeated. However, multicore applications are being deployed.
Many industry stakeholders have committed to working with the appropriate industry bodies to identify and solve the pitfalls of multicore programming using C/C++ sequential code. Such efforts require the support of software developers and processor vendors alike to derive a common set of practices that realize the potential of these processors, regardless of architecture. Only by working together, leveraging shared knowledge to streamline multicore usage, will stakeholders be able to meet these critical issues head-on.