Designed to complement conventional 4- to 20-mA analog signaling, the Highway Addressable Remote Transducer (HART) protocol supports two-way digital communications for process measurement and control devices. The protocol uses frequency-shift keying (FSK), with the digital signal made up of two frequencies—1200 Hz representing ones and 2200 Hz representing zeros. Because the average FSK-signal value is always zero, the 4- to 20-mA analog signal isn't affected.
Ideally, sinewaves of these two frequencies would be superimposed on the dc analog signal to provide simultaneous analog and digital communication. However, generating phase-continuous FSK sine-waves is not a simple matter. So the HART physical-layer specification allows for a more generalized waveform whose shape, amplitude, and rate-of-change must fall within defined limits. A trapezoidal waveform well suits the application (Fig. 1). The limiting values of the parameters are detailed in the table.
The circuit shown in Figure 2 provides a low-cost solution for generating the HART waveform and superimposing it onto a variable dc level. The HART FSK signal fed to the first NAND is gated by the active-high ENABLE signal.
Resistors R4 and R5 split the 5-V rail to form a 2.5-V reference potential, VREF. When ENABLE is low, IC1b's output is low, IC1c's output is high, and because R1 = R2, and assuming the NAND outputs swing rail-to-rail, the voltage VIN at IC2a's noninverting input also sits at 2.5 V.
When ENABLE is taken high, the outputs of IC1b and IC1c oscillate in phase with each other and invert the FSK squarewave, such that VIN is now a small squarewave swinging symmetrically about VREF with a peak-to-peak amplitude (in volts) given by:
where VP is the positive supply-rail voltage, nominally 5 V, and R1||R2 is the parallel combination of R1 and R2. With the resistance values shown in the figure, VIN(P-P) is 200 mV—i.e., the signal swings from 2.4 V to 2.6 V.
At the instant that VIN rises to 2.6 V, IC2a's output goes into positive saturation and C3 starts to charge via R6 and R7. Therefore, the voltage VHART on C3 rises linearly until it reaches 2.6 V. At this point, IC2a rapidly comes out of saturation and behaves as a simple follower, holding VHART at 2.6 V.
When VIN falls to 2.4 V, IC2a's output goes into negative saturation and C3 starts to discharge via R6 and R7. Consequently, VHART now ramps down linearly until it achieves 2.4 V, at which point IC2a comes out of saturation and again acts like a follower, holding VHART at 2.4 V.
The resulting trapezoidal waveform is equal in amplitude to VIN and swings symmetrically about VREF. The trapezoid's rate-of-change (in V/ms) is given by:
where VSAT is the positive or negative output saturation voltage of IC2a.
Because the ac content of VHART is very small compared to VSAT, it may be approximated by its quiescent level, namely VP/2, or VREF. Also, if IC2a has rail-to-rail output swing, then it is reasonable to assume that its output saturation levels are 5 and 0 V. Therefore, provided that R7 is much smaller than R6, the expression for the rate-of-change (in V/ms) may be simplified to:
Thus, with values for R6 and C3 as shown in Figure 2, we find that the trapezoid slews at ±1.25 V/ms. If we take the peak-to-peak amplitude of VHART (200 mV) as being equivalent to a HART current signal of 1 mA p-p, the 1.25-V/ms slew rate is equivalent to 6.25 mA/ms in the HART current signal. This sits nicely within the limits quoted in the table.
Note that R7 is necessary to isolate IC2a from the pole introduced by C3, thereby maintaining closed-loop stability. The required value depends on IC2's bandwidth and the value of C3, and it should be chosen to provide optimum waveshape without incurring any ringing or overshoot on VHART. IC2 must be a reasonably wideband device able to slew much faster than the HART trapezoid. The dual LM6132 provides fast, rail-to-rail output while drawing moderate supply current. Other devices like the MAX4126 are equally suitable.
The second half of IC2 is used to superimpose the HART signal onto a variable dc level, VDC.
The voltage at IC2b's output, VO, (in volts) is given by:
By making R8 to R11 equal in value, the expression simplifies to:
VO = VREF + VDC − VHART (in volts)
Because VHART consists of a 200-mV trapezoid swinging symmetrically about VREF, the output (VO) contains only the small HART waveform riding on the variable DC level. By feeding VO to a suitable voltage-to-current converter, each 200 mV of VDC is equivalent to 1 mA of current. Thus, varying VDC from 0.8 V to 4.0 V is equivalent to a 4- to 20-mA current range.
Resistors R8 to R11 should be much larger than R6 to ensure that they negligibly affect C3's charging current. However, they must not be too large. Otherwise, IC2b's input offset current may introduce errors. If the resistor values are well matched, VREF disappears completely from VO, such that any inequality in R4 and R5, and/or variations in VP have minimal effect on the dc content of VO.
The scope photo in Figure 3 shows how the output at VO responds to the ENABLE signal. Initially, VO sits at the level set by VDC. Then when ENABLE goes high, the output ramps between the HART levels in response to the 1200-Hz squarewave. When ENABLE goes low, the output ramps cleanly back to the quiescent dc level.
Although developed for HART-compatible instrumentation, the circuit could be adapted for other applications where it's necessary to limit the slew rate of a signal while maintaining precise control of its amplitude.