Tessil Thomas

Tessil Thomas is a Principal Engineer at Arm. He’s the technical lead for IO Competency Center at Arm and a key contributor to architecture standardization efforts related to PCIe for Arm systems as part of the “System Ready” program.

Tessil is one of the participants in PCI-SIG protocol Working Group from Arm. He also leads the effort to have use-case driven PCIe performance verification in pre-silicon. Prior to Arm, he was with Intel where he was part of Xeon processor design team. Tessil has extensive architectural and micro-architectural expertise in PCIe, power management, memory controllers, and design for debug. He has 43 granted and 7 applied for patents.