This article series is in the Test & Measurement topic within our Series Library.
IBIS stands for input/output buffer information specification. It represents the characteristics or behavior of the digital pins of a device that IC vendors provide to their customers for use in high-speed design simulations. These models mimic the device’s I/O behavior using parameters specified by the IBIS Open Forum, an industry organization that manages and updates the specifications and standards for IBIS models.
IBIS models don’t contain proprietary data because the IC schematic design information—such as transistor sizes, parameters of the device model used in the design of the buffer schematic, and circuitry—aren’t revealed in the model. They're supported by most EDA vendors and can be run in a majority of industry-wide platforms.
Simulation models such as Spice and IBIS are now being widely developed for use in simulations to help system designers foresee signal-integrity issues during the presimulation stage, so that they can be addressed before fabrication. This stage helps lessen the chances that the board fails during testing.
This three-part series breaks down in detail the different facets and techniques involved with IBIS modeling: