“Time is of the essence”—an old idiom that could be applied to any field. However, when applied to the sampling of real-world signals, it’s a pillar of our engineering discipline. When attempting to lower power, meet timing targets, and maintain performance requirements, consideration must be given to the type of analog-to-digital converter (ADC) architecture chosen in measurement signal chains—sigma-delta or successive approximation register (SAR).
Once a particular architecture is chosen, system designers create the circuit needed to obtain the necessary system performance. At this point, designers should consider the most important timing factors for their low-power precision signal chain.