Active Clamp Control Boosts Forward Converter Efficiency

In the conventional design of a forward converter, the maximum duty cycle can be extended above 50% by using a reset and clamp technique. This technique, known as RCD clamp circuitry, consists of a resistor, capacitor, and diode. These components are used to develop a varying clamp voltage into which the magnetizing energy is discharged and dissipated as heat.

Compared to the conventional forward converter design, the RCD clamp eliminates the primary reset winding, reducing the transformer production costs. The RCD clamp technique is commonly used in designs where a wide input voltage range requires management. In particular, designs with low input voltage ranges benefit significantly from this technique, since the component stresses are still manageable with low voltage semiconductors. Despite the benefits of the RCD clamp, the switching FET has to withstand a high voltage stress during the reset of the RCD. Additionally, switching losses in the main FET can significantly reduce the overall efficiency and limit the operating frequency of the converter. Fig. 1 shows the basic schematic of an RCD forward converter.

Forward Converter with Active Clamp

In an active clamp design, a power MOSFET replaces the resistor and diode of an RCD clamp. The same IC that controls the main power MOSFET controls the clamp MOSFET. You can see a simplified schematic of a forward converter with an active clamp and self-driven synchronous rectifiers in Fig. 2.

By using an active clamp technique instead of the conventional RCD clamp, the efficiency of converter is increased in several ways. First, the active clamp provides soft switching for both the main FET and clamp FET. In addition, implementing synchronous rectifiers on the secondary side provides a significant boost in efficiency. Finally, instead of dissipating the magnetizing energy in a clamp resistor, the magnetizing energy is recycled back to the input source.

Fig.3, on page 53, shows the drain-to-source waveforms of the four power FETs in the active clamp forward circuit. A complete switching period can be broken down into six individual switching periods to simplify the description of a full cycle. The transitions between each switching period are labeled as t₀ to t₆ in the figure.

Starting at time t₀, the main switch (Q₁) is on and the primary winding on the transformer sees the full input voltage. The reflected voltage on the transformer secondary turns on the forward MOSFET (Q₃), while at the same time turning off the freewheeling MOSFET (Q₄). Current is being supplied to the load from the input source, and energy is being stored in the magnetizing and leakage inductance of the transformer. With Q₂ off, the clamp capacitor is fully charged and disconnected from the circuit during this portion of the switching cycle. Fig. 4 shows the current flow during this portion of the cycle.

At time t₁, the Q₁ turns off. As the energy stored in the leakage and magnetizing inductances begins to charge the drain-source capacitance of Q₁, the voltage across the primary of the transformer begins to drop. The drain-source capacitance of Q₁ continues to charge until its voltage is equal to the voltage of the fully charged clamp capacitor. As the drain-source capacitance of Q₁ is charged, the voltage across the transformer primary decreases, and eventually reverses polarity.

The voltage on the transformer secondary eventually decreases below the turn-off threshold of Q₃, which allows Q₃ to turn off and Q₄ to turn on. During this transition, cross-conduction between Q₃ and Q₄ is prevented by the fact that the drain of Q₃ is connected to the gate of Q₄. Q₄ cannot turn on until Q₃ has completely turned off.

At time t₂, the drain-source voltage of Q₁ is equal to the voltage on the clamp capacitor, and the body diode of Q₂ begins to conduct. The remainder of the leakage energy is dumped into the clamp capacitor during this portion of the switching cycle. The magnetizing current decreases as its energy is transferred into the clamp capacitor. The transformer primary voltage remains at a negative potential, as the core is reset. The negative voltage on the transformer secondary ensures that Q₃ is off, while Q₄ is on. The inductor current is freewheeling through Q₄ during this portion of the switching cycle.

At time t₃, Q₂ is switched on. Since the body diode of Q₂ conducts before Q₂ is switched on, Q₂ turns on with a zero-voltage transition. This reduces switching losses in Q₂. After Q₂ is turned on, the magnetizing current continues to decrease to zero amps and eventually reverses. The control IC must turn Q₂ on before the magnetizing current attempts to reverse directions. The exact delay before Q₂ is turned on is controlled by the control IC. During this portion of the switching cycle, the inductor current continues to freewheel through Q₄.

At time t₄, the magnetizing current reverses directions, as some energy is removed from the clamp capacitor. The inductor current continues to circulate through Q₄, which remains on.

Towards the end of the switching cycle, at time t₅, Q₂ turns off. The controller's oscillator determines the timing of this action. When Q₂ turns off, the clamp capacitor is removed from the circuit, and remains charged. The drain-source capacitance of Q₁ charges up until its voltage is equal to the input voltage, and the voltage drop across the transformer primary drops to zero volts. At the same time, the transformer secondary voltage drops low enough to turn off Q₄.

A new switching cycle begins at time t₆, where Q₁ turns on again. The UCC3580 provides a programmable delay between the turn off of Q₂ and the turn on of Q₁. This delay ensures that the drain-source capacitance of Q₁ has been discharged to the input voltage, which reduces the turn on losses in Q₁. Cross-conduction between Q₃ and Q₄ is prevented by the fact that the drain of Q₄ is connected to the gate of Q₃. Q₃ cannot turn on until Q₄ has turned off.

Design Example

A 100W, 3.3V forward converter employing active clamp control with self-driven synchronous rectifiers is shown in Fig. 5, on page 53. While the schematic of this design is as shown in Figs. 6 and 7, on page 54. It uses the UCC3580-1 controller to provide control of the switching regulator. Here, the main switch is an N-channel FET (Q₁), and P-channel FET (Q₂) is utilized as the clamp FET. The controller provides the drive for both MOSFETs.

This active-clamp design uses two bias voltages, one for the primary side and one on the secondary side. The output inductor (L₁) contains an auxiliary winding, which is used to produce the primary-side bias, while the circuit composed of C₁₀₀, C₁₀₁, D₁₀₀, D₁₀₁, Q₁₀₀, and R₁₀₁ produces the secondary-side bias.

Breaking the feedback path with R₁₉ and R₂₀ provides remote sensing. By connecting the remote sense terminals directly to the desired regulation point, the converter compensates for any voltage drops between the output of the supply and the load. If remote sensing is not required, R₁₉ and R₂₀ may be shorted, in which case regulation will be provided directly at the converter output filter.

The feedback network is typical of most isolated forward converters. The TLV431 (U₂) incorporates a voltage reference and transconductance error amplifier into one package. Providing type III compensation around U₂ compensates the voltage-mode converter. The shutdown pin of the UCC3580-1 provides over-current protection. The current is sensed at the source of the main power FET by a current sense resistor composed of R₂ and R₁₀₃. Resistor R₁₆ lowers the shutdown threshold voltage, which further improves the converter's efficiency.

The controller uses a built-in input under-voltage protection, while the comparator circuit of U₄ provides input overvoltage protection. Both the input overvoltage and input under-voltage circuits provide hysteresis. The circuit containing U₅ and U₆ provides the output overvoltage protection.

The circuit operates from input voltages between 36V and 75V, at load currents up to 30A. The output voltages typically vary by only 4mV (0.1%) over the entire line and load range, see Fig. 8. The output ripple voltage of this design is kept below 26mV (0.8%) over line and load, as you can see in Fig. 9. Most importantly, this design is more than 90% efficient for nearly the entire operating range, as depicted in Fig. 10. At these power levels, obtaining an efficiency better than 90% is unlikely with a conventional RCD clamped converter.

Applying the Active Clamp Technique

By reducing losses in the main power switches and implementing self-driven synchronous rectifiers, an active clamped converter significantly improves the efficiency over conventional RCD clamped forward converters. Although not shown here, designers can also apply the active clamp technique to flyback converters. The increased efficiency of the active clamp forward converter allows the use of smaller power components, and consequently reduces the amount of board space consumed by the design.