Robust serial interfaces such as USB and IEEE-1394™ have revolutionized personal computing. They provide a simple-to-use interconnection to a variety of different peripherals, ranging from products such as wireless mice and keyboards to portable CD/RW players, wireless LAN access points, cable and DSL modems, as well as digital consumer products like digital still and video cameras. From a consumer perspective, the major benefit of these industry-standard interfaces is that they are supported by a robust software stack within the PC, which allows an easy plug-and-play experience.
These interfaces have evolved (USB 1.1 has transformed to USB 2.0 and IEEE1394a has a new extension with IEEE1394b) through their standards committees and associations to add new capabilities and improvements to expand ease of use. Both interfaces have undergone significant changes over the last few years to support dramatically higher data rates and new applications such as cell phones with USB-OTG (on-the-go) extensions, and additional physical cabling mediums. The table describes the primary attributes of these interfaces.
In addition to all of the traditional data carrying capabilities, both interfaces have provisions to provide dc power to allow the peripheral to be powered from the host system. The standards apply strict rules as to the load requirements and apply a power budget to which the peripheral must adhere. If product designers stay within these guidelines, they can eliminate the external ac-dc “brick” adapter, which saves cost, eliminates cables and connectors, and provides the consumer with a more mobile peripheral. Moreover, if the product is portable and rechargeable — for example, a PDA, MP3 player, or cell phone — then you can use the serial interface as an auxiliary charger, which is an attractive product feature.
However, these benefits are not without cost, and the designer must scrutinize their power distribution architecture and understand the worst-case load requirements to stay within the budget.
Power Management Considerations
Since USB is the most popular serial interface, we'll use it as an example to understand some of the key power management considerations. USB 2.0 is the current standard. It has provisions for three data rates: low speed and full speed, which are backward-compatible to USB 1.1, and high speed (480 MBit/s), which has been added to support new multimedia and quicker data transfer for large data blocks. All USB 2.0 ports aren't necessarily high speed, unless they are labeled as such and both classes have the same power capability. The USB architecture consists of a host/root hub.
Downstream to this are devices as well as other hubs that are attached to the bus in point-to-point connections. These devices may also have downstream ports that expand like tree branches, as shown in Fig. 1. Hubs provide power to downstream devices and may be bus powered from the VBUS line within the USB cable or self-powered from an external supply.
Power within the USB world is measured in unit loads, which are in 100mA increments. A low-power device is only able to use one load, while a high-power device may consume up to five loads, because when dealing with a high-power device, it's important to also consider the hub capability. The hubs have the same classification with low power ports — they're able to supply one unit load. High powered ports must supply a minimum of five loads. Thus, if designers can architect their peripheral to stay within the “low power” domain, they can have truly universal connectivity. Otherwise, some additional constraints will be placed on the user. Practically speaking, most PCs have some high-powered ports; however, it's an additional disadvantage to the user.
In setting the total power budget for the peripheral, it's important to understand worst-case conditions. High-powered hub ports must supply a voltage between 4.75V to 5.25V, and low-powered hub ports must supply a voltage between 4.4V and-5.25V. Taking into account the worst-case bus drop of the connectors and cabling this translates into a minimum of 4.5V (high power) and 4.35V (low power), which results in a maximum power ceiling of 435mW for a low-power peripheral and 2.25W maximum for a high-power peripheral. Additional constraints must also be considered. Current PCs and laptops have a variety of power-saving modes that have been factored into the USB standard. The main one that influences the power supply design is that when the peripheral is put into “suspend mode,” through a command the peripheral can draw no more than 500uA of current. One exception is for high-powered devices with remote wakeup, such as a modem, where the upper limit is increased to 2.5mA.
Interfaces such as USB offer the ability to hot-plug a peripheral into the bus at any time. Once this occurs, the operating system (OS) goes through a process called “enumeration,” where it detects the peripheral, and then goes through a recognition and configuration process. On the hardware side, this places two requirements on the designer.
First, regardless of whether the peripheral is high or low powered, it shouldn't draw more than one unit load (100mA) from the bus prior to it being configured, and the in-rush current must be limited to less than one unit load. In addition, for high-powered peripherals as they transition out of configuration, they must continue to limit inrush current such that the VBUS does not droop more than 330mV. This is one reason the specification requires that the effective load presented by the peripheral to the VBUS be in the range of 1uF to 10uF. Second, since it's possible for a user to connect a high-power peripheral to a low-power upstream hub, the high-powered peripheral must operate down to 4.35V and be able to respond to the “enumeration” process such that the OS will know of the fault condition. The key specifications required for a bus-powered peripheral are listed below:
Selecting Power Management Components
Because the system requirements are now clearly defined, we can understand how they dictate the power management component selection. For that analysis, we'll explore a low-powered scenario.
Fig. 2 illustrates a typical low-power peripheral such as a Bluetooth wireless modem. Since our total budget for this block is 100mA worst case, the first step is to understand the load and quiescent current demands of the chipset selected and any extra features that need to be incorporated — for example, an LED indicator for proper connection of the USB to the peripheral and voltage supervisory functions to ensure that the peripheral doesn't power up until the VBUS voltage is stable.
Low quiescent current CMOS LDOs, such as the NCP512 from ON Semiconductor, would be an ideal solution, given its low quiescent current of 40uA, small 1uF input capacitors, a PSRR of 50 dB, and SC-70 micro-packaging. On the other hand, if the current draw from the chipset under peak loads, such as during data transmit, isn't safely under the current budget, it may be necessary to replace 1.8V LDO with a high-efficiency low quiescent current buck converter, which offers efficiencies greater than 90%.
If we consider a peak current of 35mA for the controller under the low VBUS condition, the LDO is dissipating approximately 90mW, which is more than 20% of the total power budget. A low-voltage dc-dc pulsed/PWM buck converter such as the NCP1510, which has been optimized for low quiescent operation, is a good substitute. Under a load of 35mA, this converter has a typical efficiency of 85% that translates into a converter power dissipation of 11mW, which is only 2.5% of the total power budget.
Some of the additional advantages of the NCP1510 is that the input capacitance can be less than 10uF (which stays below the USB specification), it has soft-start circuitry to avoid loading the VBUS on startup, and it has a quiescent current of 15uA typical under light load, which easily supports the suspend mode current of <500uA. The NCP1510 has a switching frequency of 1 MHz nominal, which allows the use of small, low-profile inductors in the range of 6.8uH. Fig. 3a illustrates NCP1510 buck regulator, while Fig. 3b illustrates the block diagram of the NCP512 LDO. Both of the figures also detail the associated external components.
As illustrated by this example, you must take care to understand all of the tradeoffs of the many different power management choices. Analysis for a high-powered device such as a DSL modem is more complicated, since three to five voltages may be required: 1.8V and 3.3V for the DSP/micro-controller, 3.3V and 5V for the analog front-end, and up to 12V for the output line driver.
Fortunately, you can address most of these voltages with a simple buck or boost converter. The only challenge may be the 5V requirement, which, depending on the voltage tolerance of the 5V analog ICs, will require either a very low dropout regulator or a buck/boost converter because the VBUS specification spans 4.75V to 5.25V.
Peripherals Continue to Grow
With the universal acceptance of standard serial interfaces within personal computing and personal entertainment applications, the number and diversity of peripherals continue to grow in storage, audio accessories, communication devices such as wireless LANs, as well as digital image applications. For the USB interface, as long as the peripheral can stay within the high-power 2.25W budget, good power management techniques can be used so the device can be directly powered from the bus.
In the case of the IEEE1394 serial interface, that power budget increases to 12W+, which allows support for more complicated storage and audio/visual peripherals. Both trade associations for these interfaces have detailed specifications and training information to aid designers in developing products that are compliant to the standards.
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