Product performance and reliability are essential to success in today’s global marketplace. The product must be correct when introduced, and it must be correct in a fast-cycle-time and short-product-life environment.
Identifying design flaws before a product is manufactured and eliminating manufacturing and workmanship flaws before the product ships can save significant time and money. As a result, manufacturers of electronic and electromechanical products use various analytical tools and stress testing techniques, such as design verification testing (DVT), accelerated stress tests, environmental stress screening (ESS), and shock and vibration tests, to ensure the reliability of their products.
Model for Testing
To see where testing fits into the electronic equipment design and manufacturing cycle, we will use the model shown in Figure 1. It is a very general, yet typical, block diagram of the design, manufacturing, and first customer ship (FCS) flow for electronic equipment. Evaluations, analyses, and tests are conducted at various points as determined by the market requirements for a given product. Not all equipment manufacturers employ the full spectrum listed, but only those items that are appropriate for their market.
Reliability Prediction
Early in the design cycle, as soon as even a rough bill of material (BOM) becomes available, a reliability prediction is made at the printed wiring assembly (PWA) and system levels to see if the product will be in the ballpark of customer expectations. Typically, this prediction is based on the well-established Bellcore standards.
The Bellcore standards provide a level of consistency that often is required when evaluating design alternatives. This prediction is refined throughout the design cycle as the BOM solidifies. Predictions are easily tailored to match actual component temperatures based on thermal infrared mapping.
Signal integrity and thermal simulations and analyses also are conducted and refined throughout the design phase. Component suppliers of complex ICs and packages provide SPICE and thermal models to facilitate the task. Electrical characterization tests of vital components in the design are conducted for critical or unspecified parameters to determine circuit performance, operating margins, and degradation issues.
Design Verification Testing
Once a prototype has been manufactured, DVT is conducted to ensure that it meets its performance specifications during exposure to environments such as temperature and humidity. It also is used to assess design margins.
At this time, the shipping package is designed, including the type of foam, container, pallet material, and construction. The package design is a result of conducted vibration and mechanical shock tests based on the expected transportation environment.
Accelerated Stress Testing
At the conclusion of the design phase, accelerated stress testing is conducted. Accelerated stress testing determines a product’s robustness and detects inherent design and manufacturing flaws.
Typically, a series of individual and combined stresses, such as multiaxis vibration, temperature cycling, and product power cycling, is applied in steps of increasing intensity well beyond the expected field environments until the fundamental limit of technology is reached. This requires fixing all anomalies and failures.
The results of accelerated stress testing are:
Fed back to designers to select a different supplier, to improve a supplier’s process, or to make a circuit design or layout change.
Fed back to manufacturing to make a process change, typically of a workmanship nature.
Used to determine which ESS profiles to use during production testing.
Regulatory Tests
Appropriate reliability tests, thermal-mapping analyses, and regulatory tests are conducted at the conclusion of the design phase. To sell products in various geographical markets, specific regulatory compliance requirements must be satisfied. Consequently, the right regulatory tests must be conducted to ensure that the product meets the required limits.
For products such as computers, medical devices, and telecommunications products, safety tests (UL 1950, CSA 950, EN 60950), electromagnetic compatibility tests (FCC Part 15, EN 55022, EN 50082-1, IEC 801-2/3/4), and, as appropriate, telecommunications tests must be performed. In all cases, certification of the product is a legal requirement. The results of these tests are submitted to the appropriate government agency from which certification is desired. Approval takes four to 10 weeks.
Regulatory Approval
As we begin manufacturing beta units, the required regulatory approval hopefully is received. The timing of the submission of the test report to the required agency is extremely important since the electronic equipment manufacturer has no control over the time it takes to receive approval.
Package Verification
During beta manufacturing, the package design is verified by conducting mechanical shipping and packaging tests. Product reliability must include a consideration of service life and the capability of the equipment to withstand shock and vibration. Shock and vibration, which are present in all modes of transportation, handling, and end-user environments, can cause wire chafing, fastener loosening, shorting of electrical parts, component fatigue, misalignment, and cracking. Dynamic testing tools that simulate environmental hazards, including sine vibration sweep, random vibration, shock, and drop impact, are used to more effectively test products to ensure resistance to these forces. Product acoustic noise is measured for installation planning relating to workplace noise-emissions compliance. Both sound pressure and sound power are measured according to ISO Standard 7779, the standard recognized by European Union countries.
Production ESS
Once the product enters FCS and production manufacturing, most of the component, design, and manufacturing issues should be resolved. Depending on market requirements and product and process maturity, ESS can be used to quickly identify latent component, manufacturing, and workmanship issues that could later cause failure at the customer’s site. Optimum ESS assumes that design defects have been identified and corrected through implementation of the accelerated stress testing process.
The ESS profiles are derived from the accelerated stress test results. The proper application of environmental testing will ensure that the product design can be purged of latent defects that testing to product specifications will miss. A typical ESS profile is shown in Figure 2.
Figure 3 shows ESS yield for a composite mix of different PWAs manufactured and tested during a given calendar quarter. Figure 4 is a bar chart of the Q3 97 yield bar divided into its constituent components; that is, five PWAs that combine to produce the bar of Figure 3.
This chart shows the value of conducting ESS in production and the potential impact of loss in system test or the field if ESS was not conducted. Notice the high ESS yield of mature PWAs (PWAs #1 to #3) but the low ESS yield of new boards (PWAs #4 and #5).
The benefit of ESS for new products is evident here. Nonetheless, the value of ESS must be constantly evaluated. At the point when yield is stable and predictable and there is no discernible difference between ESS and post-ESS yield, it makes sense to discontinue its use for that product.
Ongoing Reliability Tests
Some electronic equipment manufacturers use ongoing reliability tests to continuously assess the manufacturing process against the predicted reliability. The results of the tests can be extrapolated to develop a statistical understanding of projected field reliability. Again, the use of these tests depends on the end-market requirements.
Gathering and Analyzing Field Data
The best understanding of product reliability comes from gathering and analyzing product field data. Analysis of field reliability data indicates:
The effectiveness of the predictions made and the reliability tests conducted.
Whether established goals are being met.
Whether product reliability is improving.
An example of this is shown in Figure 5. The part replacement rate for the disk drive controller is plotted vs time using a three-month rolling average.
Failure Analysis
At all test points in the product design-to-customer ship cycle, it is important to identify and capture all component anomalies, verify if the anomaly is a real component problem, conduct a failure analysis, and have the supplier develop and implement a mutually agreed upon course of corrective action to prevent recurrence. The low ppm levels of currently produced ICs demand that every anomaly be investigated based on the market expectations and costs incurred. A risk assessment of the problem must be made.
Benefits of Testing
The tests and analyses called out in the product design-to-ship model of Figure 1 provide these benefits:
Identify design and manufacturing weaknesses.
Estimate return rates for warranty planning.
Ensure a more robust and manufacturable design.
Provide a cost-effective reliability design solution.
Determine availability for guaranteed product uptime.
Reduce time-to-market.
Reduce development, sustaining engineering, warranty, and field repair costs.
Enable fast production ramp-up.
Minimize downtime.
Conclusions
The model gives you a feel for the various types of tests and analyses typically used to produce high-reliability electronic equipment. Not all electronic equipment manufacturers need or should conduct the full battery of analyses and tests.
There is no one right or wrong model. The test and evaluation tools that ultimately are used depend on the type of equipment produced, the geographical served market, the costs incurred vs the benefit, a risk and field exposure assessment, customer and market needs, and government regulatory requirements.
About the Author
Eugene R. Hnatek is director of the Product Evaluation Center at Tandem Computers. Previously, he was component engineering manager at the company. Mr. Hnatek has worked in the IC quality and reliability field for more than 30 years and has published 11 books on the subject. Tandem Computers, 10300 N. Tantau Ave., Loc 55-53, Cupertino, CA 95014-0725, (408) 285-2609.
Copyright 1998 Nelson Publishing Inc.
March 1998