Due to efficiency, quality, and cost, digital communications systems play a major role in telecommunications, especially wireless services. With most digital modulation schemes represented as in-phase (I) and quadrature (Q) modulation formats, I/Q baseband signal generation is a crucial requirement from the R&D lab to the manufacturing line.
Validation and verification of the I/Q modulator design necessitate differential/balanced signal generation. Physical-layer testing of circuit parameters such as phase and amplitude balance, DC balance, and input compression point is critical to the success of the finished product. Shortcomings in the I/Q modulator stage lead to phase and magnitude error, resulting in incorrect bit transmission.
I/Q Test-Signal Properties
To test I/Q modulator performance, two baseband analog signals are needed: the I and Q signals. They require amplitude accuracy and low distortion and jitter. These properties are important in digital communications because of the demands of conveying higher amounts of information within a limited bandwidth. Relatively high distortion and jitter translate to increased bit error rates in a digital communications system.
In addition, the I and Q signals must be tightly synchronized with controllable relative phase, amplitude, and DC offset. The I/Q signals also may need to be differential outputs since modulator designs are increasingly differential in today’s market. As a result, each input will need differential test signals to examine and study the performance of the circuit.
Four inputs are needed for full flexibility: I-, I+, Q-, and Q+. With four independent test tones representing the two differential signals, it is possible to fully stress the design specifications of a global system for mobile communications (GSM) or code division multiple access (CDMA) products.
I/Q Signal-Generation Requirements
Typical demands on the test signals can consist of the following criteria:
- Phase tuning range from -10° to +10° with 0.1° resolution.
- Differential I/Q signals up to 2 MHz. The base bandwidths of standards such as GSM and CDMA go up to 1.3 MHz.
- DC offset on each differential line from -1.5 V to +1.5 V with 1-mV resolution.
- Maximum output of 500-mVpk-pk with 10-mV resolution.
In addition, the relative phase, DC offset, and amplitude of each differential line can be set independently.
Many two-channel differential signal sources can generate I/Q signals but may not be able to address the issue of fully independent control of each differential line’s parameters such as phase, amplitude, and DC offset. The key to the solution lies in synchronizing multiple sources, specifically four single-channel signal sources. The form factor most suited for synchronization of multiple devices at the frequencies of interest is a modular instrumentation platform such as PXI or VXI.
Stand-alone instrumentation does not lend itself well to such applications, since each discrete signal source needs to be cabled and programmed separately. Meticulous care must go into the details of calibration and timing. Platforms such as PXI and VXI are designed for applications requiring precise timing and synchronization. They come equipped with trigger and clock buses where individual modules can transmit and receive multiple triggers and clocks via the backplane buses with software commands.
With the PXI trigger bus and built-in 10-MHz reference clock, multiple PXI arbitrary waveform generators (Arbs) such as the NI 40-MS/s PXI-5411 can be phase locked and synchronized to provide the required signals. Essentially, the application calls for four Arbs synchronized where each Arb output corresponds to the I-, I+, Q-, and Q+ signals.
Figure 1 (see right) shows the outputs of four synchronized Arbs. Let’s look at these requirements in detail.
Phase Tuning Range From -10° to +10° With 0.1° Resolution
This requirement is addressed with the timing and triggering features of the PXI platform and the phase-locked loop (PLL) capabilities of the Arb. Four Arbs can be synchronized to output I and Q signals by phase locking the voltage-controlled crystal oscillator (VCXO) of the Arb to the PXI 10-MHz reference clock. One of the Arbs is designated as the master, and it initiates the synchronized outputs by transmitting a trigger signal to the slave Arbs via the PXI trigger bus.
Skew and Jitter
Two issues come to the forefront for synchronization: skew and jitter. Skew is the relative offset in time between the outputs. The skew arises from the inherent delay between the master and slave Arbs due to the propagation time of the trigger signal across the PXI trigger bus. This can reach a maximum of 5 ns. Two 2-MHz tones with a specified phase offset of 0.0º are in error by 3.6º, resulting from a 5-ns skew.
The solution is to program the phase delay in the sinusoidal waveforms. The waveforms representing sinusoidal patterns, downloaded to the Arb, can be designed so that the initial sample point from the master Arb is offset to reflect the delay.
Adequate vertical resolution is needed to calibrate for the phase delay resulting from the skew. The minimum vertical resolution of the Arb should be 12 b. The 12-b resolution in an output range of 2 Vpk-pk gives an ideal code width of 0.49 mV. A phase delay of 3.6° implies that the master Arb output must be delayed by 3.6° relative to the slave Arbs for all outputs to be correctly aligned. Near the 90° and 270° sine wave peaks, 3.6° corresponds to less than a 2-mV offset between master and slaves, easily satisfied by a 12-b Arb.
Phase locking two 2-MHz sine outputs with a relative phase difference of 0.01º corresponds to a time difference of 140 ps. This implies that the channel-to-channel jitter preferably should be 10 to 40 ps rms.
In Figure 2, the channel-to-channel jitter of two synchronized 40-MS/s Arbs generating 2-MHz tones is measured with the Tektronix CSA 8000 Communications Signal Analyzer. The rms jitter is 35.38 ps with 95% of all data falling within 2s of the mean value of the histogram. The PXI synchronized multi-Arb system in this case fulfills the phase-resolution requirement.
Differential I/Q Signals up to 2 MHz in Frequency
Preferably, the Arb should have sample rate and bandwidth exceeding 20 MS/s and 8 MHz, respectively. Over-sampling eases the demands on the low-pass analog filter, avoiding phase distortion of the output tone.
Over-sampling also pushes out the sample-rate images in frequency, which eliminates aliasing with the aid of the low-pass analog filter. These specifications give a comfortable margin of performance for the application. As a result, with four high-speed Arbs synchronized, all four lines that constitute the differential I/Q signals can be easily generated.
Variable Amplitude With DC Offset
Additionally, an Arb must be able to output up to 30 dBm (10 Vpk-pk into 50-W load) and provide attenuation down to 70 dB (-40 dBm) in 0.001-dB steps.
Two-Arb Solution
If the test requirements do not include independent phase, amplitude, and DC offset control of each line, then two single-channel Arbs with auxiliary signal conditioning will suffice. For example, if you needed to vary the DC offset, amplitude, or phase between each pair of signals vs. varying all three parameters on each of the four lines independently, then the two-Arb solution is more cost-effective.
The solution calls for the use of an external signal-conditioning stage (Figure 3). This scheme essentially takes in a single-ended output, produces the corresponding differential/balanced signals via the use of an RF transformer stage, and adds in DC offset from a DC analog source. It requires minimal space, uses passive circuit elements that do not require any auxiliary power, and provides a balanced signal output with DC offset.
An RF transformer with low insertion loss for the desired frequency range is required. The transformer should have a center-tapped secondary winding. This feature enables the use of a DC analog signal to provide the desired DC offset. The 16-b NI PXI-6704 static analog output module, for example, can provide the DC level via the center tap of the secondary transformer.
The DC offset voltage requirement of -1.5 V to +1.5 V is a fraction of the maximum output range of the NI PXI-6704 (-10 V to +10 V). To take advantage of the 16-b resolution of the analog output of the NI PXI-6704, a simple voltage divider circuit was added to divide the output voltage by five. The values of the resistors were selected on the basis that the load will be in the tens of kilohms and have a small impact on the DC impedance of the circuit.
A bypass capacitor is added to the circuit to maintain the center tap at an AC ground potential. Center-tapped windings of a transformer are not always identical on the upper and lower portions.
When passing the Arb signal through the transformer, a small fraction of the signal appears across the divider network, effectively adding AC ripple to the desired DC offset. Adding the bypass capacitor eliminates the ripple, providing a flat DC offset.
Insertion Loss and Impedance Matching
Setting the Arb outputs to 1 V does not necessarily translate to 1 V seen at the load. Two issues affect the voltage seen by the load: insertion loss and impedance matching.
Insertion loss is inevitable as the signal passes through the RF transformer, which must be taken into account. Also, the load impedance seen by the source is through the primary of the transformer. With the load in the tens of kilohms, the voltage of the Arb output must be adjusted accordingly for the desired voltage.
If the output of the Arb terminates into a 50-W load, the actual output will be the voltage programmed for the output. If the output terminates into any other load, the levels are as follows:
where:
Vout = the maximum output voltage level
RL = the load impedance in ohms
RO = the 50-W output impedance of the Arb
The flexibility of having independent control of the DC offset, amplitude, and phase of each differential line can be achieved with the synchronization of four signal sources. The use of a modular instrumentation platform allows for an easier solution because it provides the timing and triggering capabilities needed for the demands of synchronization of tones in the megahertz range.
About the Author
Lokesh Duraiappah is a product manager at National Instruments. He joined the company in 1998 as an application engineer before moving to product management in the modular instrumentation group. Dr. Duraiappah received an A.B. in physics from the University of California and a Ph.D. in physics from The University of Texas. National Instruments, 11500 N. Mopac Expressway, Austin, TX 78759, 512-683-5601, e-mail: [email protected]
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February 2003