WLBI and Test Churn Out KGD

The huge number of ICs used in today’s electronic products is difficult to comprehend, and each one has to be tested. Traditionally, testing starts at the wafer level to determine gross defects. By eliminating obviously bad parts as early as possible in the manufacturing cycle, only apparently good parts are packaged and thoroughly tested.

Today, testing still starts at wafer level, but the paradigm has changed because of the increasing complexity of products such as portable phones as well as the need to make them very small. These two factors have resulted in stacked-die packaging, which requires a supply of known good die (KGD).

Instead of merely identifying bad parts, wafer-level testing today also has to measure individual die performance. The resulting KGD are then assembled in stacked-die configurations and thoroughly tested as packaged parts. It’s important that the wafer-level test results correlate to final test values across the range of operating temperatures.

Because several die could be mounted in one package, it’s critical that KGD really are known to be good. It only takes a fault in one die to scrap the entire package. With a number of die involved, the value of a stacked-die package is much higher than for a conventional single-die IC.

As with packaged parts, simultaneously testing several die in parallel improves throughput and reduces the cost of test. However, a multisite wafer-level probe must be much more mechanically precise than for a single site. All the probe tips associated with each die must exhibit the required planarity, scrub, and overtravel characteristics. In addition, the separate groups of probe tips have to be accurately positioned with respect to each other.

How practical it is to simultaneously test multiple parts depends on the type of IC. For example, FormFactor makes the Harmony™ XP Probe Card that can contact all the 1-Gb DRAMs on a 300-mm wafer with only two touchdowns. Such a large scale isn’t possible for very complex devices with hundreds or even thousands of I/O connections. Neither is it practical for RF ICs with several ports. In these cases, the number of available RF instrument channels or the I/O capacity of the ATE being used are limiting factors.

The Wentworth Laboratories Accumax® Vertical Probe Card provides thousands of contacts but in a much more compact area than FormFactor’s Harmony XP. In an application undertaken with Azul Systems, an Accumax probe card successfully tested a 48-core processor chip with more than 11,700 contacts. Dealing with just one of these chips is a large-scale exercise involving 120-A supply current.

Wafer-level burn-in (WLBI) often is combined with test, but here again the type of die being tested governs what is practical. Aehr Test makes two types of WLBI and test machines. The Fox-1 uses a conventional wafer prober and Aehr Test custom contactor and signal distribution circuitry. The Fox-15 is targeted toward high-volume burn-in applications where all the die on up to 15 wafers are simultaneously contacted. No prober is used in the largest capacity system or in the Fox-V, which is specifically designed for burning-in vertical-cavity surface-emitting lasers (VCSELs).

A special loader/unloader is used to insert a wafer in a Wafer Pak™ together with the appropriate contactor and signal distribution board. Multiple Wafer Paks then can be cycled in parallel. Wafers from 50 mm to 300 mm in diameter have been tested with the Fox full-wafer contact system.

The actual contacts can be micro springs or based on membrane and MEMS technologies. Each die receives separate power and ground connections so that faulty die can be isolated from the rest of the wafer. I/O signals are treated individually or multiplexed as required.

In discussing the Fox systems, Martin Hemmerling, a sales engineer at Aehr Test, said, “People are using our WLBI and test equipment for various reasons, and certainly a big one is in the production of KGD. But, that’s not the only reason. Some of the test strategies that have been designed into chips can most effectively be performed during full-wafer contact in a Fox machine, and many of our systems are used for this as well. If you can save sufficient time by using full-wafer contact with massively parallel testing, this approach is probably the right decision.”

Wafer Probers

Except for the Aehr Test machines that use a cartridge system to hold and contact wafers, most types of probe cards are used with a wafer prober. Steve Martinez, vice president of marketing at Electroglas, described some of the factors involved in large-scale probing.

Perhaps the most obvious result of contacting a wafer with thousands of probes is the large force created. As much as 200 kg must be withstood by the chuck holding the wafer and the structure supporting the chuck. Not only should any deflection be minimized, but it also needs to occur uniformly over the chuck’s area to avoid planarity errors.

In production, wafers are handled and aligned automatically with the probe card. For example, the EG6000 prober features ±1.5-µm pin-to-pad accuracy. A proprietary grid-based surface mapping approach and advanced probe-to-pad alignment algorithms contribute to this specification. In addition, active vibration cancellation helps to maintain consistent contact resistance, reducing yield loss.

Excerpts from the Model EG6000 300-mm Production Wafer Prober datasheet help to describe some of the Z-axis technologies involved. “The EG6000 uses an impact control technique called MicroTouch™ to control the velocity and deceleration of the chuck top as the device’s bond pads contact the probe pins. This minimizes impact force and because the stage slows just before contact, high throughput is maintained. To ensure the consistency of the probe force on each touchdown, from die to die and wafer to wafer, a comprehensive Z strategy is employed.

“…Probe tips are accurately measured and monitored for thermal expansion and wafers profiled with a new high-resolution technique. Finally, the wafer is positioned by the Z stage with a resolution of up to 50 nm.Compensation for thermal expansion and contraction…is automatic. This enables testing to resume rapidly after changing temperatures.”

In a paper delivered at the 2006 Southwest Test Workshop, Gunther Boehm of Feinmetall GmbH, examined prober stability for large probing area and high pin-count. He concluded that critical probe parameters such as scrub length could be affected by prober deflection. To cope with the very large forces involved, probers must be rigid in not just the Z axis, but also in all three directions.¹

In addition to highly automated production machines, specialized probers also are available for use in failure analysis, device and process characterization, and low-volume production test. For example, The Micromanipulator Company produces the 300-mm, semi-automatic P300A Probing System. Because of the investigatory nature of typical applications, it features an integrated dry and dark environment and is suitable for femtoamp-level low current measurements at high or low temperature extremes.

Wafer probing can be accomplished through manipulator-mounted multisite probes such as Celadon Systems’ VersaTile™ Cards. In Celadon’s modular approach, several separate multicontact tiles can be mounted on the VersaPlate™, giving access to up to 17 separate locations on a wafer. Thermal expansion is held to only a few microns in this arrangement, ensuring good site-to-site alignment.

Probe Technology Examples

Although the Pyramid Probe from Cascade Microtech is not new, it has been extended to handle multisite testing. According to David Leslie, senior product marketing manager, Pyramid Probe Group, three major electrical and mechanical challenges have resulted from the increasing use of multi-Gb/s protocol-driven buses and RF ports.

• High-speed signal integrity: High-density signal routing challenges crosstalk requirements through increased coupling and consumes routing space for low-inductance power and ground planes.
• Smaller pad sizes and pad spacing: Smaller die requiring smaller pad sizes and spacing are shrinking the target for probe-tip interfacing and scrubbing.
• Probing pad-over-active area designs and fragile low-K dielectrics: Traditional probing mechanisms can have excessive scrub, causing dielectric cracking and damage to active devices.

The Pyramid Probe combines proprietary material deposition, lithographic patterning, etching, and plating processes involving flexible substrates. Probe tips, as well as the metal layers and vias between layers, are photolithographically defined and processed. Layers of polyimide on the top and bottom of the membrane encapsulate the conductors so the only exposed contacts are the probe tips. Nonoxidizing nickel-alloy probe tips are plated and connected to the different conductor layers through vias. The probe construction is shown in Figure 1.

The probes feature microstrip transmission lines that maintain impedance control. When these are combined with low-inductance power and ground planes that have bypass capacitors mounted directly on the probe, the result is high signal fidelity.

Up to 804 I/O connections are available on the VLSR type probe core with an area of 38 mm x 11 mm in which probe tips can be placed. As many as 120 two-lead SMT components can be mounted on the probe core. In common with most of the smaller core sizes, the VLSR uses microstrip lines that provide overall bandwidth from 2- to 20-GHz depending on the type of probe-card wiring and connector used. Probe spacing is nominally 50 µm, and tip size ranges from 12 µm to 25 µm depending on the material being contacted.

FormFactor has developed its MicroSpring® technology to deal with pad pitches as small as 60 µm and pad sizes down to 55 µm. In one application, KGD production is addressed by the UPstream™ Series of probe cards, intended for WLBI and test of memory components at up to 150°C. With greater than 40,000 contacts, massively parallel burn-in is possible (Figure 2). UPstream uses the company’s tester resource enhancement (TRE™) technology, which supports high parallelism, significantly reducing the total number of touchdowns needed per wafer.

Amy Leong, FormFactor’s senior director of strategic marketing, said, “In addition to UPstream for WLBI and test, the Harmony series of probes is intended for full-wafer high-density applications at speeds up to 300 MHz. Planarity across such a large area has been accomplished with technology that allows probes to be tilted as a single plane and makes possible fine adjustments to localized areas. Less than 30-µm variation in probe height can be achieved.

“In addition, Harmony probes also allow modular repair,” she continued. “If a card is damaged, it can be repaired at local service centers simply by replacing the area where the damage occurred. The MicroSpring design allows for single damaged springs to be replaced in the field without disassembling the probe card.”

Key to both Harmony and UPstream products is thermal stability. The probe card’s coefficient of expansion must closely match wafer behavior over temperature if accurate alignment is to be maintained over large areas. In this regard, Harmony is claimed to improve throughput by having sufficient thermal stability to achieve a soak time of only a few minutes, resulting in faster setup.

The most recent FormFactor development is the TrueScale™ PP40 Wafer Probe Card intended for parallel test of wire-bond system-on-chip devices with pad pitches down to 40 µm. Based on a scalable MEMS technology, TrueScale provides proven scrub characteristics as well as low-contact force while allowing eight or 16 devices to be tested in parallel compared to a maximum of two or four with other probe technologies.

A variation of vertical probing technology is used in Wentworth’s Accumax and Micromax™ Probe Cards. The probes are similar, but Micromax is used for pre-bump flip chips or aluminum bond-pad applications and Accumax for flip- chip bumped devices commonly referred to as C4 devices. Both types of probe cards can be designed for multiple site parallel-test applications.

The company’s proprietary Saber™ contact is used in the probes and provides improved performance. Rather than being stamped, the Saber contact is photo-defined and chemically etched. It has a sharp end to ensure low resistance in spite of oxides encountered in aluminum pad and pre-bump flip-chip probing. In addition, the contact can carry greater than 600 mA continuously in high-power test applications.

Both Accumax and Micromax Probes have the advantage of easy contact replacement on site by the customer. Without disassembling the probe card, you can extract a broken or burned probe and insert a replacement one. This is a major improvement over conventional vertical probe technology.

Accumax contact stiffness is 2.5 g/mil standard or 1.5 g/mil in the low force version. The minimum pitch is 140 µm. Planarity less than 50 µm and radial alignment within 25 µm are specified. Micromax contact stiffness typically is 1.8 g/mil, and pitch can be as small as 75 µm. Probe tip alignment is within 17 µm but planarity remains at 50 µm as for Accumax.

Noncontact probing is a new technology developed by Scanimetrics. Power and ground connections still are made conventionally, but signal lines are coupled between pairs of 50-µm square antennas on the wafer and the probe card. Similarly compact RF transceivers running at 2 to 4 GHz are modulated by the signals and drive the antennas.

You may wonder why anyone would want to do this and what advantages the technology can offer. Those were two of the areas discussed in an interview with Jeff Hintzke, the company’s director of marketing.

On relatively large ICs, from one-third to one-half of the pins are used for power and ground connections. If you assume the figure is one-half, then not contacting the other half of the pins that are used for I/O signals means that the force seen by a prober is about half of what it would otherwise be. Because the alignment between the wafer and the probe card antennas has from ±15 to ±20-µm tolerance in both the X and Y directions, prober requirements are relaxed. In the Z direction, as long as the distance between the wafer and the probe-card antennas is less than a specified maximum, such as 100 µm, data will be transferred correctly.

As a result, one advantage of the new technology is wider tolerance probe alignment that should allow the use of a lower cost prober. It can be argued that the solution also is more robust because the need for 100% electrical contact reliability has been removed. The power and ground connections are highly redundant, and the signal paths will operate correctly as long as the wafer and probe card are aligned within tolerances.

Further advantages depend on creative design. Because the transceivers can be placed anywhere on a die, you could design a device with access to BIST circuitry through noncontact antennas in the middle of the die. The circuit only would be accessed during test so fewer actual contacts would be required on the die perimeter. On very small geometry 45-nm and 32-nm parts, noncontact probing eliminates any possibility of cracking or tearing aluminum pads positioned over delicate low-K dielectric layers.

At present, probe cards are being built with specially designed die to match the antenna positions on product die within the wafer. The probe-card die are tiled onto a ceramic substrate that also can carry conventional power and ground probes. Because of the small size of the transceivers and antennas, wafer-scale noncontact probing could be possible in the future.

Cantilever probes continue to provide a low-cost test solution for less stringent test requirements. If you don’t need to test more than two or four devices simultaneously, the fastest signal speed is less than a few hundred Megahertz, and die pads are arranged in a conventional perimeter or staggered linear layout, then a cantilever needle probe could be a good choice.

This technology has the advantages of low cost and fast delivery compared to most other approaches. On the downside, it cannot be extended to handle larger numbers of devices simply because the mechanical complexity involved becomes too great. Neither is it perhaps the most robust type of probe, although they have been used for so long in so many applications that a wealth of cleaning, repair, and alignment experience exists across the industry. Regardless of the technical capabilities of any other types of probes, cantilever needle probe cards still are used today to test a large proportion of all semiconductor devices.

Summary

As the diversity of available solutions shows, there is no one best type of probe for all applications. Nevertheless, it is true that most probe technologies have been developed to simultaneously contact at least two or four die and in some cases many hundreds. The best approach for your application will depend on more factors than simply having a multisite capability.

Starting from knowledge of the special characteristics of the wafers that will be tested, you can eliminate some probe types. For example, cantilever needle probes aren’t as suitable for area-array pad layouts as for staggered linear or perimeter layouts. To reach all the array rows without mechanically interfering with each other, the needles have to be arranged in several layers, creating a mechanically complex probe. A more compact technology such as FormFactor’s MicroSprings or Wentworth’s vertical probes might be a better solution.

For very small geometry wafers with pads on top of low-K dielectric, it’s hard to beat the advantages of Scanimetrics’ noncontact probing. On the other hand, this is a new technique, adds RF circuitry to your device, and may require increased die area.

If your main concern is production of KGD and you can develop a test method that doesn’t have to run at full-chip speed, then Aehr Test’s Fox WLBI and test machines may be appropriate.

For any of the available probe technologies, the greatest gains will occur if the probing solution is considered as the chip is designed. This obviously is the case for Scanimetrics, because the RF transceivers and antennas have to be added to the design. But, it also is the case that if the die is designed to complement the capabilities of a probe technology, fewer test problems will result.

Reference
1. Boehm, G., “Prober Stability With Large Probing Area and High Pincount,” SouthWest Test Workshop, 2006.

February 2008