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    Tim Symons

    Associate Technical Fellow, Microchip; Gen-Z Consortium Marketing Workgroup Co-Chair
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    Tim Symons is an Associate Technical Fellow at Microchip Technology and marketing co-chair of the Gen-Z Consortium. He is a specialist in memory and storage interface protocols, PHYs, and the interface ecosystem. Tim has represented storage industry standards for nearly 20 years, including the development of SATA, SAS, NVMe, PCIe, and Gen-Z.

    He is currently editor for the INCITS T10 SAS Protocol (SPL) standard and an expert in hardware platform architectures for secure, high-availability, reliable data-storage systems. His focus is on emerging memory fabrics, including Gen-Z, CXL, and OpenCAPI, that expand and enable sharing of high-performance memory to processor and accelerator systems.