Paul Graykowski

Paul is a Senior Technical Marketing Manager for Arteris IP with over 20 years of experience in the design and verification of systems on chips. Prior to Arteris, Paul specialized in Verification methodology with a focus on technologies that eventually became SystemVerilog and UVM. Over his career he has worked at Compaq, Intel, and Synopsys in several roles, including design consulting, product and methodology specialist, technical and product marketing, and application engineering leadership. He holds a BSEE from Texas A&M.