Tom Hill

Tom Hill has over 25 years of experience in field applications, and product and strategic marketing in the electronic-design-automation and semiconductor industries specializing in field-programmable gate arrays (FPGAs) and ARM-based AP SoCs. Hill is the DSP Product Line Manager for Intel’s Programmable Solutions Group and is responsible for the C++ and MathWorks-based design flow and IP used to program Intel FPGAs. 

Previously, Hill served as senior manager of DSP Solutions at Xilinx, where he was responsible for marketing the DSP processing features of Xilinx devices for 4G/5G wireless, MILCOM SDR, radar, control, and vision applications. Before that, Hill was the Technical Marketing Manager at AccelChip, responsible for sales support and product marketing for high-level design tools targeting FPGAs. Hill began his career as an ASIC designer with Lockheed, where he as an early adopter of HDL design tools and represented Lockheed on several early IEEE-1076-1987 VHDL standards committees. Hill holds a B.S. in electrical engineering from Cleveland State University.