Design Kit On Way For A/M-S 0.18-Micron Process

Implemented for use with Cadence physical design flows, X-FAB Silicon Foundries' first design kit for its modular 0.18-µm analog/mixed-signal CMOS process will be available by the end of 2006. Available from its subsidiary in Kuching, Sarawak, Malaysia, the XC018 Master Kit will enable engineers designing CMOS low-power applications to have a smooth and efficient path from design through physical implementation, and experience shorter design cycle times.

The 0.18-µm CMOS (XC018) technology is targeted for mainstream and advanced analog and mixed-signal applications. It features from three to six metal layers and supports applications at 1.8 V, and 3.3 V or 5 V. It also supports noise-reduced applications enabled by ISOMOS, and high-voltage (32-V) applications for power management, consumer electronics and industrial circuits. With the XC018 technology, mixed-signal chip designers can integrate more functionality onto a single chip for more complex applications.

X-FAB will use the 0.18-µm analog/mixed-signal process as the core for future developments and enhancements including RF, non-volatile memory, OTP and MTP and high-voltage features governed by automotive standards.

The comprehensive XC018 Master Kit for use with Cadence technology includes the Process Design Kit (PDK) as well as a low-power digital core library and I/O libraries for core and pad limited designs. Within the PDK are primitive device models supporting Virtuoso Spectre, HSPICE and Eldo circuit simulators and P-cells for schematic driven layout. The kit also includes runsets for Cadence Assura physical verification, and design rule and process specification manuals.