Did You Buffer The Buffered Buffer?

Part of my job as an applications engineer is reviewing designs. I’ve found that too many engineers use way too many op amps. One customer used one op amp for a buffer, another for a level shifter, a third as a filter, and a fourth for gain. He balked when I suggested he could do all these things with a single op amp. He said that his customers were more comfortable with individual stages.

When engineers say, “I’m doing this for the customer,” it’s really to make things easier for them. This engineer had no trouble visualizing the design with four separate stages. I convinced him that the immediate advantage of easily understanding a design with four stages was much less important than the long-term benefits of reduced manufacturing cost and increased reliability. (Reliability rule 1: Four things create four times as many failure points as one thing.) I left him to Spice the heck out of the new circuit until he understood it.

A Carton Full Of Cheap Op Amps

It was great to be an engineer in the late 1970s and early 1980s. Small-scale 74HC integrated logic was abundant and inexpensive. Following the successful uA741 came the TL064, LM324, LF444, and other inexpensive frequency-compensated op amps. Engineers could pepper their designs with them. Not sure whether you needed a buffer? Just grab the op-amp shaker. Is a low-impedance input dragging down your signal? Shake some more.

What has changed since the 1980s are analog-to-digital converters (ADCs). Many have buffered inputs. And in many cases, delta-sigma ADCs have removed the need for anti-aliasing filters and external gain. These days, most any input to the analog portion of an IC, be it the analog inputs of your favorite microcontroller or a nonlinear function like a four quadrant multiplier, will have input impedances well in excess of 10 MΩ. Here are some common mistakes that occur when the designer looks at each circuit function in isolation.

Buffering A Voltage Node

Figure 1 is a simplified schematic of an integrating-feedback buck converter. The output is scaled and buffered. This signal is fed to a simple integrator and the integrated signal is converted to a digital density via the analog modulator.


1. This simple control loop compares the scaled output to a reference. The integrated difference is converted to a digital density and then converted back to an analog voltage by the LC filter.

(The type of modulator isn’t important to this discussion. There’s more information on modulators in my previous columns on density. Go to http://electronicdesign.com/author/35617/DaveVanEss)

This digital density, produced by the analog modulator, is converted back to an analog output with the LC filter. The ratio of R1 and R2 determine the output voltage (Vref ∙ [(1 + R2)/R1]). The RC time constant sets the response time of the control loop.

The designer has forgotten Monsieur Léon Thévenin, whose theorem was explained in EE 101. The buffer and its input resistor are quite unnecessary. The scaling resistors have an equivalent source resistance feeding the integrator’s input. For a given source resistance (R), the scaling resistors can be recalculated. These calculations assume the power supply has an output impedance substantially less than the load presented by the resistors:

Solving for R3 and R4 results in:

If the resulting resistor values are so small they unduly load the power supply, the capacitor’s value can be decreased by a factor of 10 or 100, and the resistor values increased by the same factor. (This is a good way to use smaller and less expensive caps, regardless of the resistors’ load.) Figure 2 is the schematic with the modified resistor values, and one less op amp and one less resistor.


2. Selecting appropriate resistor values allows the buffer to be discarded.

The “Inductive” Output

Real-world op amps have a non-zero open-loop output resistance. In a closed loop, the output impedance is this resistance divided by the loop gain. Loop gain decreases with frequency, so the closed-loop output impedance increases. Which components have an impedance that increases with frequency? Yes, inductors! Unfortunately, this effect isn’t large enough to exploit, but it is large enough to cause problems.

The circuit in Figure 3 is a two-pole 1-kHz low-pass Butterworth filter, implemented with Sallen-Key topology. Ideally, the corner frequency is determined by the passive components, and the gain rolls off at 40 dB per decade (12 dB/octave).


3. The simplicity of this design means that the op amp’s “inductive” output will affect the high-frequency response.

The op amp is Linear Technology’s LT1464. It has a gain-bandwidth product of 1 MHz. With the component values shown, the corner frequency is 996 Hz and the damping (Q) is 1.4.

Figures 4 and 5 show the circuit’s transfer function, as simulated with LTSpice. I realize many of you don’t have bosses sufficiently enlightened to provide you with analog modeling tools. LTSpice is the best free version of Spice I could find. Alas, the only op-amp models provided are Linear’s. Still, it’s a great tool for understanding the real-world complications of analog circuits.


4. The Sallen-Key “bump” occurs when an op amp’s output acts as if it were inductive in the rolloff region.


5. The output of a Sallen-Key filter doesn’t have to be the output of the op amp.

When the response reaches the corner (a) and falls, the op amp’s output starts showing a significant inductive component. Meanwhile, the capacitor that this output feeds decreases in impedance.

The op amp’s output impedance eventually reaches a point (b) where it’s greater than the capacitor’s impedance. The feedback now looks primarily inductive and the response rises at 20 dB/decade (12 dB/octave). This continues until the frequency reaches the point at which the op amp’s gain-bandwidth is unity (c).

With the gain less than unity, the feedback cannot be sustained, the output impedance is relatively constant, and the response flattens to 0 dB/decade. The op amp’s “inductive” output thus limits the circuit’s performance, reducing high-end attenuation to no more than –70 dB.

If, however, the filter feeds a high-impedance input (such as an ADC), the output can be taken from the non-inverting input. The op amp itself is configured as a unity-gain amplifier, so the signal at the non-inverting input must be identical to the signal at the output. This adds some isolation from the inductance, significantly improving high-end attenuation, as shown in Figure 5.

The filter’s response is now “ideal” to 1 MHz and has a maximum attenuation of –120 dB—not bad for an op amp with gain-bandwidth product of 1 MHz! And with this topology the op amp is not part of the direct dc path, so the filter cannot introduce a dc offset.

Active Filters That Have Only Real Poles

An active filter that has only real poles just frosts me. If the only reason for an op amp’s presence is low output impedance, and low impedance isn’t needed, then neither is the op amp. Figure 6 shows schematics for two real-pole low-pass filters with nearly identical transfer functions.


6. If all the poles are real and low output impedance isn’t needed, lose the op amp!

The filter on the left is a two-pole Sallen-Key low-pass filter with a damping value of 2.00. The filter on the right is a passive two-pole low-pass filter with a damping value of 2.01. The half-percent “error” in the damping frees you from the op amp’s offset voltage, bandwidth limitations, noise, power consumption, and, most importantly, its cost.

Conclusion

Op-amp overuse is a sign you’ve concentrated on the implementation of specific functions before understanding their implications for the complete system. Using op amps only where they are truly needed can transform a good design into a great design.

Discuss this Article 8

pbelleau
on Jul 9, 2012
Interesting article. I can see how eliminating the buffer can save a couple components and could be a good idea in certain situations. The only potential problems I see with this are: 1. The opamp used as an integrator is more subject to damage should a spike occur on the output. Whereas the original circuit was isolated from the resistive divider by an opamp and a resistor, the voltage present on the output is divided down and connected to the non-inverting (+) input with the reference voltage connected to the inverting (-) input. If the opamp's input doesn't have emitter degeneration but instead is just 2 bipolar transistors this could destroy it. 2. The buffer opamp can supply virtually unlimited (within specs) drive to the integrating capacitor. In the non-buffer circuit this current must flow from Vout through R3. Just as a note, the equation for the output voltage should be: Vout=VREF(R1+R2)/R2 + (Ic x R)= VREF(1+R1/R2)+(Ic/R), or neglecting the voltage drop across R, Vout= VREF(1+R1/R2).
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tucsonmike
on Sep 25, 2012
Just stumbled across this Dave - interesting points. I am building Intersil's online active filter tools so your SKF example caught my eye. That is a great point about pulling the output off the V+ node to improve the stop band rejection. We see this in the online tools sims all the time for the SKF, the response going flat at the output as the loop gain collapses and the signal feeds through the feedback C. Your idea is very nice, with the following caveats - 1. We often design for some gain in the higher Q stages (reduces noise gain peaking) - if so, the V+ input is no longer the desired outputs. 2. The working assumption is the load for the V+ is >> than the R2 element - often, we are looking at multi-stage filters so tapping off the V+ node is not an option - op amps provide gain, level shifting and impedance isolation - this last is very useful for multi-stage filters. 3. To overcome this loss of stop band rejection in a low power design, I often suggest a consideration be given to the MFB stage - that is included in the Intersil online tool as an stage by stage option and it works well if the baggage it brings is ok (inverting, only VFA supported, the SKF can also use CFA devices) But for a single stage SKF driving into a very light load, tapping off the V+ node is great idea. Thanks.
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