I am slow, dumb, STUPIDO. However, the sudden cessation of stupidity is worthy of some mention. I knew about CMOS circuits in the 1970s. I even designed a CMOS operational amplifier back in '74. It used about 15 transistors to run on ±5-V supplies and provide a gain of 10,000. At the time, several engineers looked at my two-stage, cascoded differential amplifier and asked, "Why do you make life so complicated? Why don't you just use TWO transistors of a CMOS inverter for an op amp, like everybody else does?"
I explained that the PSRR of a CMOS inverter was about 24 mV per 1% shift of either supply, and in a real system, that was unacceptable. Maybe 1/2 mV per 1% was tolerable. Further, if VTN changed by 0.09 V, and VTP changed by 0.11 V, the "offset voltage" of the 74C04 "op amp" could change by ±0.2 V—an obvious disaster! Not to mention the power-supply drain that could vary all over the place!
So my critics had to admit that differential amplifiers had advantages versus dumb inverters. This op amp went into the Teledyne Semiconductor 9400 analog to-digital converter with 8-, 10-, or 12-bit resolution. Yes, there were DVM chips out earlier than 1975, but that was the first ADC characterized as an analog-to-digital converter (NOT as a DVM). I designed this along with Frank Jones. It used the basic 74C CMOS process that Teledyne had licensed from NSC. While Philbrick had the right to sell this ADC, they declined to do that in 1975 when it came out. The Philbrick marketing people argued that the approval of this project had only been OK'd by some previous marketing guy.
Recently, I was trying to design a little oscillator to run on 1.2 V with very low power drain. Of course, bipolars can do this. But why can't CMOS do it, such as a CD4007? The CD4007 has been characterized as a Cmos Digital IC for what, about 30 years? Obviously, it's not an analog IC. If you want to read about an analog CMOS circuit, you should obviously read AN-88 in NSC's CMOS Databook. (Hey, don't waste your time. It mostly tells you how you can use a 74C04 as an op amp.)
Now we all know that digital ICs are built of DIGITAL transistors and analog ICs are made of ANALOG transistors, right? Wrong. I cannot believe how stupid I've been. The transistors in the CD4007 would be perfectly useful as FETs in analog circuits—if they were properly characterized. Unfortunately, most of the characterization of the CD4007 is: As an inverter, how fast is it? And how many mA can it drive?
But that's not very useful. The proper question is: How many millivolts does it take of VGS to get an n-channel to put out 0.1 or 1 or 10 µA? That's because MOSFETs are pretty good at doing this.
Everybody knows that FETs are characterized by the threshold which causes the FET to put out ID = 1 µA. So currents below 1 µA are sort of imaginary, right? Wrong. Everybody knows that FETs have a square-law characteristic. As the current gets smaller and smaller, the gm per microampere keeps rising to very high levels. Wrong again. The gm per milliampere rises, but tapers up to levels such as 90 or 120 mV per decade. These transistors behave exponentially at low levels, just like bipolars.
I took data and got some curves on various CD4007s. National doesn't even sell them. Fairchild makes them, and so does Harris, Motorola, and a few other guys. Can the CD4007 be used for pretty good analog designs? I bet ya! I plotted VGS versus the ID at various levels. I may even be able to get some data on matching. The figure shows plots of the LOG of ID, from 1 nA to 2 mA versus VGS, for the n-channels and the p-channels of the CD4007. THESE plots have never been published for the CD4007. They will permit analog circuit designers to use the CD4007 for real analog circuit designs. These designs may get good micropower results, even with good output drive. We'll use some high-megohm resistors...etc.
Can these circuits run on 1.5 to 1.2 to 0.9 V of supply? Not very well—the threshold voltages are too big. But you can use CD4007s with 3 to 5 V and, if you plan right, even down to 2 V. Will these threshold voltages and VGSs move around ±0.1 or ±0.2 V? Sure, but these FETs will still be usable for analog circuits if you design thoughtfully!
All for now. / Comments invited!
RAP / Robert A. Pease / Engineer
[email protected]>or:
Mail Stop D2597A
National Semiconductor
P.O. Box 58090
Santa Clara, CA 95052-8090
