Frank Schirrmeister

Frank
Schirrmeister

Frank Schirrmeister is Senior Director at Cadence Design Systems in San Jose, responsible for product management of the Cadence System Development Suite, accelerating system integration, validation, and bring-up with a set of four connected platforms for concurrent HW/SW design and verification.

Articles
Hybrid Execution And Software-Driven Verification Will Emerge In 2013
Last year, I predicted that two things would happen in 2012. First, I suggested that the hybrid, combined use of TLM simulation and the various ways to execute RTL (including hardware-assisted verification) would find further adoption. Second, I thought that more TLM modeling would be used in the FPGA space in which both main vendors were providing virtual prototyping solutions for their new FPGAs containing dual ARM subsystems. So, what happened?
For System-Level Verification, Cooperation Beats Competition
Maintaining system-level verification at various levels of abstraction is a costly time sink. Much better is a verification environment that encompasses the electronic system level, SystemC, SystemVerilog, and RTL.
What’s The Difference Between Software Development Platforms? 1
Software development can involve virtual prototypes, RTL simulation, acceleration/emulation systems, and FPGA-based prototyping. This article breaks down when each is appropriate during the design cycle and explains their use cases.
The Early Power Prediction Predicament
There’s one more task we want our portable device to perform, and it powers down just as we’re almost done.
The Next Level Of Design Entry—Will 2012 Bring Us There?
Cadence's Frank Schirrmeister explains how the industry is edging its way toward adoption of virtual platforms and transaction-level modeling with hybrid TLM/RTL approaches and ever-larger FPGAs.
Dealing With The Pains Of Technology Adoption
Technologies for system-level design and their adoption have been a topic of debate in EDA well over a decade. Users and providers of system-level design technologies alike are watching the state of adoption, and like children on a road trip, they’re asking, “Are we there yet?”
Automotive System-Level Design Needs New Approaches
In this installment of "From Systems to Silicon," Frank Schirrmeister muses about vehicles that park themselves as you chat and how system-level design will approach their conception.
Which Design Comes First: Hardware Or Software?
Hardware and software; chicken and egg: How do you do one without the other? Do you design software-aware hardware or hardware-aware software? Synopsys' Frank Schirrmeister looks at how systems houses differentiate their products when the hardware is no longer necessarily the key.
EDA’s Next Step: System-Level Design Automation
Synopsys' Frank Schirrmeister explores the concepts behind system-level design and virtual prototyping and how moving above RTL in abstraction can improve design reuse, software-hardware integration, and debug.
2010 Will Change The Balance In Verification
Complexity will drive change in verification and system-level design, specifically in terms of hardware/software co-verification, says contributing editor Frank Schirrmeister. Embedded software is now being used to verify the hardware it runs on.
High-Level Design In EDA—Quo Vadis? (Or, Where Are You Going?)
Contributing Editor Frank Schirrmeister examines the historical shifts in the EDA industry, from layout to transistors to gates to RTL, with an eye on what may be next, including electronic-system level design and transaction-level modeling.
Embedded Hardware And Software—Like Two Camps With A River Full Of Sharks In Between
Contributing Editor Frank Schirrmeister looks at the embedded hardware and software worlds and sees the beginnings of a shift toward true cooperative development. Virtual platforms and early prototyping are being combined with classical RTL simulation.
Virtualization Innovations Drive Cost Optimization
The 2007 edition of the International Technology Roadmap for Semiconductors (ITRS) states that “design cost is the greatest threat to the continuation of the semiconductor roadmap.” While this claim has been made even long before then, in light of the cur
When One Plus One Has To Be Less Than One
A customer recently suggested he could only add new steps to his process if the sum of the current workload and the additional workload to add the steps would result in less work overall. It took a little while for me to let that math settle in, but in re
TLM-2.0 APIs Open SystemC To Mainstream Virtual Platform Adoption
At the 45th Design Automation Conference in June 2008, the Open SystemC Initiative (OSCI) announced the ratification of the TLM-2.0 standard, enabling interoperability for transaction-level models (TLMs). The next steps after ratification were to formaliz
Understanding the AirPods' Rise
Q&A: What’s New in the Wireless Audio Market? Interview with Jawad Haider, Marvell Semiconductor Read Now
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TDK Swears by Sensor Fusion in $1.3 Billion Deal for InvenSenseBy James Morra New Products Read Now
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