The 28nm node is creating a ‘twilight zone’ for mixed-signal IC design, according to the CEO of Berkeley Design Automation, Ravi Subramanian. I saw Subramanian speak at an event recently; while getting digital IC design right is becoming a science, analogue is becoming an art, he said.
At 28nm, device model complexity increases rapidly and parasitics play havoc with simulation times. Noise becomes a first order effect, fundamentally limiting circuit performance.
As feature sizes decrease, corner spread increases. As corner spread increases, low threshold voltage devices are preferred. This helps mitigate corner spread but at the expense of leakage.
Low power requirements mean reduced supply voltages, and these low supply voltages can mean even more complexity for the designer to deal with.
Designing mixed signal circuits for high yield is throwing another spanner in the works. This requires awareness of the process’ performance from the manufacturing and reliability perspective. Initial layout must now be performed with electromigration in mind, and effects such as hot carrier injection must be considered. In fact, Subramanian described mixed-signal circuit yield as the biggest bottleneck in achieving volume production of ASSPs at 28nm.
All these additional requirements and considerations are turning 28nm into a twilight zone for mixed signal design. This twilight zone has seen a massive increase in number and complexity of design rules. There are more rules for device usage, density requirements and physical design. The relatively large devices used in analogue design (eg decoupling/filtering caps) must be distributed very carefully. Double patterning means specific device orientations have to be used and the types of device and device geometries are very restricted.
At 130nm, analogue designers could memorise all the rules they needed to know, but at 28nm this is no longer possible. What will happen when processes shrink even further, though? What’s beyond the twilight zone?