Electrostatic discharge (ESD) frequently occurs in nature, and in the electronics equipment environment, with very damaging results. Indeed, it's responsible for more than 25% of the semiconductor chip damage happening during wafer fab, through various stages of circuit assembly, and on the completed and in-use electronics equipment.
Typically, the discharge stems from a human body part (finger) being in close proximity to electrically charged dissimilar materials, and then subsequently to conductive contact points attached to electronic devices. At best, this causes damaged ICs and warranty claims against the manufacturers of the end-user devices.
This problem is so serious that the European Union (EU) has defined specific standards of ESD suppression for any product sold in that economic zone. Now designers must provide effective ESD protection for today's ever-more-sensitive semiconductors.
Unfortunately, this task often follows an afterthought design principle: first build the circuit without additional overvoltage transient suppression, relying on the on-board IC protection. If tests indicate sensitivity during the prototype phase, then add the protection devices. If this approach is taken with today's lower operating voltages, increasing frequencies, and lower noise requirements, the entire design must be optimized and integrated. Adding the protection at the end can be more expensive, or impractical due to time constraints.
Generally, ESD events are described by three primary ESD algorithms based on the type of charge process and severity of transient surge: the human-body model (HBM), the charged-device model (CDM), and the machine model (MM). These models define the types of transient threats so engineers can define specific semiconductor chip-overvoltage transient-level sensitivities, plus chip and assembled product-test procedures. Using these models, circuit designers can test the ESD protection effectiveness of a chip and product uniformly—and quantitatively compare alternative solutions.
The direct transfer of charge through a series resistor, such as a human finger, is the most common source of ESD damage. Thus, the pre-eminent ESD model is the HBM. This is represented by the discharge of a 100-pF capacitor through a 1500-Ω resistor into the device under test (DUT). The commercial version of this standard has been the mil-spec (military specification) 883 Method 3015 (Fig. 1a).
The most prevalent HBM variant is the International Electrotechnical Commission (IEC) 1000-4-2 standard defined by a 150-pF discharge through a 330-Ω resistance (Fig. 1b). This is the recognized international test required by the EU for any product sold in that region.
However, significant transient-voltage-threat and energy-level differences exist between the two models. So designers tailor the test process to that expected for their specific application. For example, IEC 1000-4-2 has a much faster voltage-pulse rise time, more pulses applied, and higher peak current (see the table).
Recently, circuit designers have been adding protection via a number of transient-voltage-suppressor (TVS) devices. Some examples include solid-state devices (diodes), metal-oxide varistors (MOVs), thyristors, other voltage-variable materials (new polymer devices), gas tubes, and simple spark gaps.
Such devices are positioned between the incoming surge and ground. They rapidly change their resistance to a low state when the incoming voltage surge reaches a level that causes them to "turn on" or conduct. Ideally, the incoming threat is partially reflected back, while the balance is partially shunted to ground through the conducting TVS device. So, a smaller portion of the threat reaches the sensitive IC in the circuit.
But ESD suppression devices all have advantages and disadvantages. With the advent of new high-speed circuits, some disadvantages have been magnified. For instance, the TVS must respond very quickly to the incoming surge. The threat voltage reaches its 8-kV (or higher) peak in 0.7 ns. The trigger or clamping voltage of the TVS device (in parallel with the input line) must be low enough to be an effective voltage divider.
Some devices shield the circuit but wear out after just a few pulses—and/or fail in a low resistance (shorted) condition, leaving the circuit with a high current drain to ground. This is, of course, deadly for battery-operated devices.
Each device has its own anomalies. Gas tubes carry high currents, yet are very slow to respond. They also wear out and don't recover. MOVs have a relatively slow turn-on response for high-speed circuits. Silicon diodes have a very fast trigger response and low turn-on voltages. But like MOVs and the other devices, their capacitance is relatively high, which degrades high-speed signals.
The higher the frequency, the worse the effect of the capacitance. New voltage-variable ESD devices are the only products currently capable of offering extremely low capacitance and very low off-state current leakage. Plus, they're self restoring after many pulses.
Then, there's the cost factor to consider. Designers want to keep the cost of passive devices to a minimum. Historically, diodes have had very low purchase prices due to high supply volume. Now, some of the new, high-frequency polymer devices also are very price competitive.
Several major design factors simplified the ESD suppression issue in the past. Higher device operating voltages and slower, more robust ICs were less sensitive to surges. Much lower operating frequencies meant protection speed wasn't as important. Also, higher circuit impedance from lines and leaded components, much more metal in the packaging, and fewer external contacts made things easier.
But the electronics industry has changed. Consider the explosive growth in the consumer telecommunications industry. This means more handheld (human contact) devices. Plastic has become the packaging material of choice. This means greater charge-buildup potential in tandem with a huge number of exposed metal contacts for data transfer, charging, and audio/video/RF communication functions built into the devices.
Device operating frequencies have also leaped, from a few kilohertz into the gigahertz range, creating design problems with distortion from the high-capacitance passive components used for ESD protection. Moreover, chip operating voltages are dropping, contributing to greatly increased sensitivity for any high-energy transient (localized junction heating/melting). Also, new high-frequency digital consumer devices require very low off-state current leakage for low noise.
In the low-cost production environment, cost cutting is the primary goal for all circuit components. Therefore, effective ESD suppression products should offer designers the following major benefits and features (not necessarily in the order of importance):
- Cost effectiveness.
- Shield the new consumer-electronics audio and video I/O lines and RF connectivity ports without compromising performance.
- Shield the new communication connectivity hardware.
- Constant device characteristics over a wide range of operating frequencies.
- Subpicofarad capacitance in wider-bandwidth circuits operating at multigigahertz frequencies.
- Minimal current leakage to ground during the off-state condition to minimize noise.
- Low operating-circuit signal distortion and attenuation caused by the ESD suppression component.
- Triggering and clamping characteristics to match circuit components' requirements for effective protection.
- Required circuit-mounting characteristics, form factor, and footprint. Easy installation on high-speed auto-insertion production lines.
- Maximum interchangeability between the various device alternatives, preferably without circuit-layout changes.
- High reliability over the life of the product.
Placement Guidelines: Regardless of the TVS device chosen, its placement on the circuit board is critical. The length of trace lead prior to the placement of the TVS should be minimized, as the fast (0.7-ns) ESD pulse can inductively induce additional voltage that works against the protective capacity of the TVS.
In addition, the fast ESD pulse can induce voltages into the adjacent (parallel) leads on the circuit board. If that happens, the circuit may not be protected because the induced voltage paths will produce alternate paths for the surge to reach the IC. Thus, protected input lines shouldn't be arranged next to other separate, unprotected traces. The recommended pc-board mounting scheme for ESD suppression devices should be:
- Prior to the IC to be protected but as close to the pc-board side of the attachment point of the connector/contact as possible. This eliminates the above issues.
- Before any resistor in series with the signal line.
- Before any filtering or conditioning devices including fuses.
- At any other location prior to the IC where the possibility of ESD incursion exists.
Due to the heightened industry interest in ways to deal with ESD suppression in high-frequency circuits, studies have been conducted for some large players in the consumer-electronics area. Comparative data suggests that while the trigger/clamping voltage of low-cost silicon diodes (and even varistors) is very low, their high-frequency capacitance and current leakage aren't adequate for a growing number of applications. Variable-voltage polymer devices, such as those from Cooper, have tested from 0.10- to 0.12-pF values up to the 1.8-GHz range. In contrast, typical diode values are at greater than 3 pF and rise over this range.
Another important requirement is minimal ESD suppressor influence on the circuit signal characteristics. Measurements conducted on polymeric ESD suppressors indicate less than 0.2-db attenuation up to 6 GHz—making them virtually invisible to the circuit.
Also, commercial products require ESD surge protection at all different hardware-interface locations. For example, some new computers and higher-end consumer electronics may have most or all of the following interconnect devices: Ethernet, USB/USB2, IEEE-1394/1394b, and audio/video/RF ports in addition to the traditional RS-232, RJ-11, etc., ports. All traditional protection devices have been implemented with varying degrees of success. However, increasing operating frequencies now create a need for ultra-low capacitance devices like polymeric suppressors (Fig. 2a).
The new USB 2.0 protocol has a fast data-transfer rate of 400 Mbits/s. Consequently, a device equipped with USB 2.0 will give the best performance when protected with the ultra-low-capacitance polymeric device that has SurgX technology (Fig. 2b). This will yield much less data distortion than if zener diodes or multilayer varistors are used.
In addition, many new consumer-electronics devices implement the fast IEEE-1394/1394b (Firewire) data-transfer protocol. This very high data rate—up to 1600 Mbits/s (1394b)—requires low-capacitance ESD suppressors, like the polymeric Surge devices (Fig. 2c). Test data shows that polymeric ESD suppressor devices can protect the Firewire port with much less signal distortion than the silicon-diode devices (Fig. 3).
Note too that progress continues. Designers of the various devices used for ESD suppression constantly push the envelope—developing new variations of suppressors with improved characteristics.