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Mentor Graphics is this year’s Cinderella story, rising from number 87 in the 2010 list to seventh place in 2011. Incorporated in 1981 and based in Wilsonville, Ore., it’s widely known as a leading global developer of EDA software and systems used by engineers to design, simulate, and test electronic components such as ICs, wire harness systems, and printed-circuit boards (PCBs).
Products include PADS (PCB design), Nucleus (operating system), and Calibre (IC design). Its software is used to design components for such products as computers and wireless handsets. Clients come from the aerospace, IT, and telecommunications industries, among other fields. Mentor Graphics gets more than half of its revenues from Europe and the Asia-Pacific region, particularly Japan.
Product markets are characterized by price competition, rapid technological advances in application software, and new market entrants. The EDA industry tends to be labor intensive rather than capital intensive. This means that the number of actual and potential competitors is significant.
Mentor’s two principal competitors, Cadence Design Systems and Synopsys Inc., are large companies with extensive capital and marketing resources. But Mentor also competes with small companies with little capital but innovative ideas. The main competitive market factors are breadth and quality of application software, product integration, the ability to respond to technological change, quality of a company’s sales force, price, size of the installed base, level of customer support, and professional services.
Revenues are segregated into five categories of similar products and services: scalable verification, IC design to silicon, integrated system design, new and emerging products, and services and “other.” Each category includes both product and support revenues.
• Scalable verification: The Mentor Graphics Scalable Verification tools allow engineers to verify that their complex IC designs function as intended. Functional errors are a leading cause of design revisions that slow down an electronic system’s time-to-market and reduce its profitability.
• IC design to silicon: Shrinking geometries and increasing design size in the nanometer era have enabled ever increasing functionality on a single IC. Today’s most advanced ICs are being produced in a 28-nm process with early test tape-outs occurring for 20-nm ICs. The Calibre tool family, which is a standard for most of the world’s largest integrated device manufacturers and foundries, addresses these challenges. The Olympus-SoC place-and-route product targets customers designing ICs using geometries of 65 nm and below. It addresses IC design challenges such as manufacturing variability, design size and complexity, and low power requirements. Also, the Tessent suite of integrated silicon test products is used to test a design’s logic and memories after manufacturing to ensure that a manufactured IC is functioning correctly.
• Integrated System Design: PCB-FPGA Systems Design software products support the PCB design process from schematic entry, where the electronic circuit is defined by engineers, through physical layout of the PCB, to providing digital output data for manufacturing, assembly, and test.
• New and emerging products: The Integrated Electrical Systems Division provides specialized software for design, analysis, manufacture, and data management of complex wire harness systems used by the automotive, aerospace, and other industries. A variety of software tools targeting the automotive market that focus on the functional design of the electronic components of cars also is offered.
Additional offerings include a suite of products for companies developing embedded software for products such as smart phones, automotive and aviation infotainment systems, and consumer electronics. These would be real-time operating systems, Linux and Android products and services, middleware, and associated development and debugging tools.
The Keys To Success
Mentor Graphics was our most improved company for fiscal 2011, rising in the ranks by 80 positions to the seventh slot. For the first time in its history, Mentor crossed over the $1 billion revenue line, with bookings growing at 20%, revenue at 11%, and earnings per share almost tripling.
Mentor’s strengths are both in IC design and system design. In ICs, the top 50 companies make up over 85% of the total research and development spending in the entire market. The systems market is more fragmented, comprising many smaller companies, and is harder to reach. Mentor’s channel strategy gives it an advantage in reaching those customers over the competition.
Large corporate account penetration is emphasized in the military and aerospace, communications, computer, consumer electronics, semiconductor, networking, multimedia, and transportation industries. Products are licensed worldwide through a direct sales force, distributors, and sales representatives.
Due to product complexity, the selling cycle can be six months or longer. During the selling cycle, account managers, application engineers, and technical specialists make technical presentations and product demonstrations to the customer. Products also may be loaned to customers for short-term on-site evaluation. Its strong customer support structure includes Mentor Graphics Education Services and Mentor Consulting.
Two trends benefiting Mentor should continue into the future. First, in the traditional EDA space, the movement to 28-nm and 20-nm process nodes has created accelerated demand for advanced verification and manufacturing software. Second, Mentor’s previous investments in new and adjacent systems markets and channels to EDA are now delivering rapid growth.
As the move to 28 nm, 20 nm, and below continues, top semiconductor firms are looking for new technologies to help them stay ahead in the verification game. As integrated circuit sizes reach into billions of transistors, verifying the larger and more complex chips presents growing and significant challenges.
Traditional improvements in simulation verification depended on ever higher computer processor speeds, which have not recently kept pace. Emulation technology, which can run many times faster than a simulator, has become increasingly necessary to properly verify complex integrated circuits and systems. Bookings from the emulation side of the business are also growing rapidly.
In addition to functional verification being driven by the move to 28-nm and 20-nm process nodes, these advanced process nodes also present many manufacturing challenges that produced more than 25% growth in Mentor’s IC design to silicon business. Both the increasing prototyping work with respect to the 14-nm process node and the continuing adoption of 28 nm and 20 nm should ensure healthy growth for Mentor’s EDA market.
The company’s transportation segment also is delivering rapid growth with bookings for its wire harness software delivering at twice the rate of overall company growth. As a leader in this emerging market, Mentor does business with the top six global wire harness manufacturers, three of the top six global truck manufacturers, and four of the top six Chinese auto manufacturers. A wire harness is an assembly of cables or wires that transmits signals or electrical power.
The embedded software segment is also providing rapid growth as chip design and systems companies increase their need to provide development, compilation, and debugging environments for their customers. Another rapidly growing part of the systems segment has been thermal analysis of electronic systems, with quickly growing areas like the characterization of LED-based systems and the thermal analysis of electronic packages.
Clearly the semiconductor industry transition to the 28-nm family of technologies, which broadly includes 32 nm and 20 nm, is a huge change fueling growth opportunities. According to IC Insights, the largest six of the 35 major semiconductor manufacturers (Samsung, Intel, TSMC, Hynix, UMC, Rohm) will increase capital spending by $5.2 billion or 15% in 2012. These six companies make up 64% of total worldwide spending, with Samsung the largest closely followed by Intel.
The 28-nm node is emerging as the sweet spot for select, leading-edge products, due to cost and its low-power attributes. Foundries could very well prolong their efforts at 28 nm before migrating to the more expensive and difficult 20-nm node. Much of the 28-nm demand involves chips for smart phones, tablets, and notebooks. 28-nm foundry capacity will be tight throughout 2012, and possibly into 2013, due to low yields, lack of installed capacity, and simply underestimating demand.
According to Global IC Trading Group, Taiwan Semiconductor Manufacturing Co. (TSMC) plans to produce 10,000 more wafer starts per month (wspm) at 28 nm than originally expected. Samsung Electronics is currently converting two NAND flash lines—one in Korea and another in Austin, Texas—into 28-nm foundry capacity. Global Foundries and United Microelectronics Corp. (UMC) also are expanding their 28-nm capacities.
At 28 nm, total capacity of some 65,000 wspm is expected in 2012, according to Barclays Capital. When capacity is fully reached in 2013, foundries are projected to have a total capacity of 300,000 wspm, according to Barclays. In comparison, total foundry capacity has ranged from 200,000 to 250,000 wspm per node in previous generations, meaning that 28 nm could become the largest node in history in terms of volumes.
As yields and throughput mature at 28 nm, this major wave of capital investment will provide plentiful foundry capacity at lower cost, stimulating a major wave of design activity. Cost-effective, high-yield 28-nm foundry capacity will not only drive increasing numbers of new designs, it will also force redesigns of mature products to take advantage of the cost-reduction opportunity. The impact on overall spending on EDA for the industry, which typically increases in line with semiconductor R&D spending delayed by one year, should be very positive.
According to Walden Rhines, Mentor’s CEO, semiconductor R&D spending increased 11% in calendar 2010 and 6% in 2011, and it’s expected to increase 12% in 2012. If historical patterns continue, the strong EDA industry growth in 2011 should be followed by a good but lower rate of growth in 2012 and then acceleration in 2013. Current guidance by the major EDA companies support this forecast, but it probably understates the significance of the 28-nm transition that’s likely to increase semiconductor R&D funded design activity this year beyond the current forecast.
Mentor has received some unique benefits from the 28-nm transition. First, the dramatic increase in physical verification and resolution enhancement complexity already drove 25% in growth in its design for silicon segment last year, and even with a lack of major contract renewals in the first quarter this year, it drove 30% growth into design for silicon bookings this quarter.
Second, industry consolidation of place and route has accelerated adoption of Mentor’s Olympus place and route at several of its largest customers. Place and route is a stage in the design of integrated circuits comprising two steps. Placement involves deciding where to place all electronic components, circuitry, and logic elements in a generally limited amount of space. This is followed by routing, which decides the exact design of all the wires needed to connect the placed components.
However, the largest impact has been in the adoption of emulation. Emulation is undergoing a major acceleration in growth. The 28-nm transition means that full-chip verification through simulation is no longer possible for leading-edge large chips.
Emulation technology used to be a requirement for a limited number of applications like graphics chips. But today, it’s a verification necessity for a large share of the biggest chips and has changed a great deal since it was a tool for specialists.
This quarter, Mentor announced the Veloce2 generation of accelerated verification products, which more than doubles the capacity to greater than 1 billion gates, doubles the speed, and reduces the power per gate by 40%, all compared to the company’s still very competitive first-generation Veloce1 family. While traditional in-circuit emulation is well supported on Veloce2, the trend of leading-edge customers is for the acceleration of test benches or co-modeling, virtualizing the stimulus rather than plug-in hardware and software debugs for dozens of simultaneous users.
These changes mean that emulation could be set up in a manner similar to a typical IT server farm with users remotely accessing the portion of the emulator capacity they need. And, the cost per cycle of emulation is more than two orders of magnitude lower than simulation on a traditional server farm. Bookings for this newly announced Veloce2 generation have already exceeded half of the total lifetime sales of the Veloce1 generation. Mentor had a strong year of growth in emulation last year, but it expects to achieve its full year level of revenue this year in just the first two quarters.
Emulation is so promising because a large and increasing share of the usage is systems companies. They use it to debug multichip systems and to develop and verify embedded software. The emulation business benefits from more than just the 28-nm transition. It benefits from the growing complexity of system design and the increasing need for embedded software development verification.
The combination of new applications of EDA and system design, the rapid growth of emulation, and the large design transition to the 28-nm family of processes provided the record backlog at the beginning of 2012 that helped Mentor achieve record first-quarter revenue. Based upon publicly reported numbers, Mentor’s current growth trend would put it on track to achieve the number-one market share position this year in the rapidly growing emulation market.
| Download the Top 50 Employers list in .PDF format |
See which companies are ranked the highest by their employees.