Use Underfill Encapsulants To Enhance Flip-Chip Assembly Reliability

July 30, 2012
Central to the success of high performance semiconductors is their interconnection, packaging, and assembly. With so much circuitry on a single die, communications between a chip and its external circuitry requires many more input/output (I/O) connections than traditional wire-bonding technology can support, which uses perimeter interconnects. Underfills and encapsulants address many of these issues.

For more than half a century, IC performance has doubled roughly every two years, a trend predicted in 1965 by Intel co-founder Gordon Moore. He reasoned that continued advances in photolithography would enable manufacturers to shrink transistor dimensions while minimizing costs, resulting in a biennial doubling of transistor density on attractively priced ICs.

Since then, Moore’s Law has served as a driver for engineering development throughout the semiconductor industry. Today’s most advanced microprocessor chips feature transistor dimensions of less than 45 nm and transistor densities of over a billion.

Interconnection, packaging, and assembly are central to the success of these high-performance semiconductors. With so much circuitry on a single die, communications between a chip and its external circuitry require many more input/output (I/O) connections than traditional wire-bonding technology can support, which uses perimeter interconnects. Reliability becomes an issue, and underfill encapsulants can help.

Flippin’ Chips

Developed by IBM in the 1960s, flip-chip interconnection technology addresses problems by distributing I/Os and power connections across the chip’s surface area. Tiny bumps of solder are placed on the chip’s working surface during fabrication, and the chip is mounted face down on a substrate.

The array of solder bumps allows for higher interconnect densities while enabling power distribution throughout the chip. Additionally, short interconnect lengths minimize signal inductance, resulting in speed improvements over wire-bonded chips.

Flip chips may be attached directly to a circuit board or placed into a ball-grid array (BGA) or other package, which includes a second level of interconnects. Either way, flip-chip assemblies are much smaller than wire-bonded chip assemblies and can help reduce circuit board area by up to 95%.

Because the solder interconnects provide mechanical support for the chip and allow heat to dissipate from the chip, flip chips tend to be more reliable and rugged than wire-bonded chips. Flip chips are also less expensive in high volumes than wire-bonded chips, making them ideal for high-volume electronics applications such as cell phones, radio frequency identification (RFID) tags, and watches. Explosive growth has characterized the flip-chip market, which was valued at $16 billion in 2010.

Early Flip-Chip Design Challenges

Due to the mechanics of their construction, flip-chip assemblies are more sensitive to the effects of temperature excursions than their wire-bonded counterparts. Unlike the gold wires in wire-bonded interconnections, flip-chip solder bumps are stiff and firmly sandwiched between the chip and the substrate, so they aren’t free to flex.

During thermal excursions, the silicon chip expands and contracts at a different rate from that of the substrate, inducing stress that concentrates in the solder joints. Just how much each material expands or contracts depends on its length and its coefficient of thermal expansion (CTE), which is a ratio of the change in length per degree temperature change to the initial length usually expressed in ppm/°C.

Even small differences between the CTE of the silicon die (2.6 to 3 ppm/°C) and the ceramic substrates (9.5 to 11.5 ppm/°C) used in early flip-chip assemblies induced enough stress to cause solder fatigue during thermal cycling, primarily in the outermost solder-bump interconnects. To prevent damage to the solder bumps, packaging and product assembly engineers began using epoxies to fill in the gap between the flipped chip and the substrate.

Once cured, the epoxy mechanically couples the chip and the substrate, effectively forcing them to move in lockstep, and evenly distributes the stress across the entire coupled area. As a result, there is very little differential movement between the chip and the substrate during thermal excursions, preserving the integrity of the solder joints. Instead, the motion of the silicon chip constrains the substrate’s motion, and most of the stress is dissipated non-destructively in the substrate.

Underfills Improve Performance And Reliability

The development of epoxy based, multi-function underfill encapsulants marked a turning point for flip-chip technology and the entire semiconductor industry. By distributing thermally induced stress, underfills made it possible for silicon chips to be directly attached to low-cost organic materials, such as FR-4, that present an even greater CTE mismatch than ceramic materials.

Low-cost flip-chip packaging technologies including direct chip attach (DCA), wafer-level chip-scale packages (WLCSPs), and plastic BGA assemblies were developed as a result, paving the way for the higher-density, higher-performance, and affordable semiconductors that have revolutionized the industry.

In addition to distributing stress, underfill encapsulants protect interconnects and the active surface of the chip from moisture and other environmental factors while providing mechanical support for flip-chip assemblies. By stiffening a flip-chip assembly, the underfill prevents cracks in interconnects that often result from circuit board flexure during drop testing. Underfills are formulated to be dimensionally stable so they can withstand thermal and mechanical shock while maintaining the alignment of the chip and substrate necessary to minimize stress on the solder joints (Fig. 1).

1. Underfill encapsulants maintain the integrity of solder joints while protecting the active surface of flip chips.

Specific Properties Required

The thermo-mechanical properties of underfills must be carefully formulated to ensure reliability. The modulus of elasticity of the underfill should be high enough to ensure good mechanical coupling between the chip and the substrate.

If the CTE of the underfill differs significantly from that of solder (21.5 to 24.6 ppm/°C), thermal cycling will cause the solder and the underfill to expand and contract at different rates, exerting potentially destructive stresses on the flip-chip joints. Common epoxy resins have CTE values that are roughly three times that of solder, so formulators add fillers, such as aluminum oxide or silica, to reduce the CTE. Fillers also increase the modulus and enhance the dimensional stability of underfills. But adding filler increases the viscosity, or resistance to flow, of the underfill, leading to longer processing times.

Underfill encapsulants are carefully formulated to ensure an even flow, acceptable CTE, and other desirable properties for a given application. The choice of filler type and the amount of filler used are the predominant factors that dictate the properties of underfills. Silica offers better dimensional stability, while aluminum oxide conducts heat better.

A relatively small amount of silica filler will greatly enhance the dimensional stability of an underfill without significantly increasing its viscosity, whereas a larger amount of aluminum oxide is required for effective heat transfer, at the expense of increased viscosity. For applications that require thermal conductivity, underfills containing aluminum-oxide fillers are favored. When dimensional stability without thermal conductivity is the primary design objective, silica-filled underfills are desirable.

Filler particle size also can affect flow. To ensure an even flow, the maximum particle size should be considerably smaller than the size of the gap between the chip and substrate. If the particles are too large, they could dam the gap and obstruct underfill flow.

Gap sizes vary from about 12 mils for solder-bumped printed-circuit boards (PCBs) to about 15 µm for state-of-the-art thermo-compression bonded flip chips on flexible substrates. Underfills are formulated so the largest filler particles are less than one third of the size of the smallest gap to prevent blocking. For some applications, the gap is so small, an underfill with no filler material must be used.

The predominant type of failure in under-filled flip chips is not solder fatigue, but delamination. During environmental testing, flip-chip assemblies are subjected to high temperatures and humidity. Should moisture penetrate the underfill encapsulant, the excessive heat applied during reflow soldering may produce enough vapor pressure to stress the joints. If the resulting stress exceeds the adhesive strength of the underfill, delamination between the underfill and the die, or between the underfill and the substrate, may occur. Consequently, underfills are formulated to resist moisture and to have enough adhesive strength to overcome any vapor pressure that may build up within the underfill during solder processing.

It is critical for underfill encapsulants to maintain their thermo-mechanical properties throughout the wide range of temperatures flip chips are exposed to during testing and service. Once cured, polymeric materials such as epoxies undergo a phase transition when crossing through a temperature known as the glass transition temperature (Tg).

Below the Tg of the material, the epoxy is in a hard, glassy state. Above the Tg, it transitions to a rubbery state because its molecules are less orderly and can move more freely. As a result, most epoxies exhibit significantly lower strength, a higher modulus, and a substantially higher CTE above the Tg.

If these properties were to change drastically during thermal cycling, solder fatigue or delamination would likely occur. That’s why underfills are typically formulated with glass transition temperatures of 150°C or higher, which is well above the maximum test and service temperatures for most electronic systems.

Optimizing Performance

Equally important for successful underfill performance is the proper application and curing of underfill encapsulants. Flowable underfills, also known as fast flow or capillary underfills, are dispensed through a needle placed along one or two edges of the component-substrate joint. Through capillary action, the liquid underfill is wicked into the gap, filling all voids and encapsulating the solder interconnects.

By choosing a particular filler and adjusting the amount used, formulators can create custom flow rates for different applications, chip sizes, and gap sizes. Care must be taken to dispense the proper amount of underfill so all air spaces are filled and no material is wasted.

Precision dispensing equipment is commonly used to apply one-part underfills or premixed and frozen two-part underfills with high accuracy and virtually no waste. During the dispense process, the substrate is heated uniformly to ensure adequate wetting and adhesion. Then, the underfill material is cured according to its specific cure schedule. Most underfills can be cured at room temperature or more quickly at elevated temperatures, while some underfills offer snap cures.

Conventional underfill processing adds two steps to the manufacturing process: underfill dispensing and curing (Fig. 2). To improve productivity and reduce costs, researchers have developed no-flow underfills that incorporate a fluxing function. No-flow underfills are dispensed on the die or substrate prior to component attach. Through a single high-temperature reflow/cure process, the die is attached to the substrate and the underfill is cured. The solder bumps need to make good contact with the attach pads on the substrate. As a result, most no-flow underfills don’t include fillers, which can impede joint formation. So, they have higher CTEs than even-flowing underfills.

2. In conventional underfill processing, a controlled amount of liquid underfill is dispensed along the edges of the component/substrate joint.

Typically, if an under-filled flip chip is found to be defective, the entire board must be scrapped—a costly proposition for designs involving expensive devices. Specially formulated reworkable underfills have been developed to address this problem. Because removing a bonded flip chip is an involved process that requires specialized equipment, reworkable underfills are generally used only when the component costs outweigh the rework costs. 

Conclusion

Today’s underfill encapsulants are carefully formulated to provide the right combination of thermo-mechanical properties to enhance flip-chip reliability. By providing mechanical support and stability, protection against environmental factors and mechanical shock, and adhesion of semiconductor components to substrates, underfills play a critical role in the advancement of semiconductor technology. Continued advances in underfill formulation and processing promise to pave the way for faster, simpler assembly and packaging processes and increased product quality.

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