Capable of digitizing one 12-bit channel at 3.6 GHz, or two channels at 1.8 GHz, the Model 71641 digital downconverter comes preconfigured with a programmable one- or two-channel DDC loaded into the onboard Xilinx Virtex-6 FPGA.
The Model 71641 downconverter from Pentek is capable of digitizing one 12-bit channel at 3.6 GHz, or two channels at 1.8 GHz, and comes preconfigured with a programmable one- or two-channel DDC loaded into the onboard Xilinx Virtex-6 FPGA. Suited for wideband radar and SDR applications, the module's DDC IP core supports single and dual channel modes, accepting data samples from the A/D converter at the full 3.6 GHz rate in single-channel mode or 1.8 GHz in two-channel operation. Each DDC has an independent 32-bit tuning frequency programmable from DC to ƒs, where ƒs is A/D sampling frequency. In single channel mode, DDC decimation can be programmed to 8x, 16x or 32x. In dual channel mode, both channels share the same decimation rate, programmable to 4x, 8x or 16x. Maximum output bandwidth is 360 MHz in single channel mode, and rejection of adjacent-band components within the 80% output bandwidth is better than 100 dB. Pricing for the Model 71641 downconverter starts at $23,695, varying depending on options chosen.
